Evan implemented these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt
index 2ccabca2fc7cadc851975ba2dfe7eb956969d3c6..acfe411623c0d9eb56815bd39afb32784b880114 100644 (file)
--- a/lib/Target/X86/README-SSE.txt
+++ b/lib/Target/X86/README-SSE.txt
@@ -131,32 +131,6 @@ feasible.
 
 //===---------------------------------------------------------------------===//
 
-Teach the coalescer to commute 2-addr instructions, allowing us to eliminate
-the reg-reg copy in this example:
-
-float foo(int *x, float *y, unsigned c) {
-  float res = 0.0;
-  unsigned i;
-  for (i = 0; i < c; i++) {
-    float xx = (float)x[i];
-    xx = xx * y[i];
-    xx += res;
-    res = xx;
-  }
-  return res;
-}
-
-LBB_foo_3:      # no_exit
-        cvtsi2ss %XMM0, DWORD PTR [%EDX + 4*%ESI]
-        mulss %XMM0, DWORD PTR [%EAX + 4*%ESI]
-        addss %XMM0, %XMM1
-        inc %ESI
-        cmp %ESI, %ECX
-****    movaps %XMM1, %XMM0
-        jb LBB_foo_3    # no_exit
-
-//===---------------------------------------------------------------------===//
-
 Codegen:
   if (copysign(1.0, x) == copysign(1.0, y))
 into:

diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt
index fccddc79f46a2e26868c4722e9b7d729c5d6a4a0..65de926a3e6cd1221bc1c4f2bf7dc5d9cc48a493 100644 (file)
--- a/lib/Target/X86/README.txt
+++ b/lib/Target/X86/README.txt
@@ -933,33 +933,6 @@ _test:
 
 //===---------------------------------------------------------------------===//
 
-This is a "commutable two-address" register coallescing deficiency:
-
-define <4 x float> @test1(<4 x float> %V) {
-entry:
-        %tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
-                                        <4 x i32> < i32 3, i32 2, i32 1, i32 0 >
-        %add = add <4 x float> %tmp8, %V
-        ret <4 x float> %add
-}
-
-this codegens to:
-
-_test1:
-        pshufd  $27, %xmm0, %xmm1
-        addps   %xmm0, %xmm1
-        movaps  %xmm1, %xmm0
-        ret
-
-instead of:
-
-_test1:
-        pshufd  $27, %xmm0, %xmm1
-        addps   %xmm1, %xmm0
-        ret
-
-//===---------------------------------------------------------------------===//
-
 Leaf functions that require one 4-byte spill slot have a prolog like this:
 
 _foo:

diff --git a/test/CodeGen/X86/coalescer-commute2.ll b/test/CodeGen/X86/coalescer-commute2.ll
new file mode 100644 (file)
index 0000000..ce4abf1
--- /dev/null
+++ b/test/CodeGen/X86/coalescer-commute2.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep paddw | count 2
+; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
+
+; The 2-addr pass should ensure that identical code is produced for these functions
+; no extra copy should be generated.
+
+define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind  {
+entry:
+       %tmp6 = bitcast <2 x i64> %y to <8 x i16>               ; <<8 x i16>> [#uses=1]
+       %tmp8 = bitcast <2 x i64> %x to <8 x i16>               ; <<8 x i16>> [#uses=1]
+       %tmp9 = add <8 x i16> %tmp8, %tmp6              ; <<8 x i16>> [#uses=1]
+       %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64>           ; <<2 x i64>> [#uses=1]
+       ret <2 x i64> %tmp10
+}
+
+define <2 x i64> @test2(<2 x i64> %x, <2 x i64> %y) nounwind  {
+entry:
+       %tmp6 = bitcast <2 x i64> %x to <8 x i16>               ; <<8 x i16>> [#uses=1]
+       %tmp8 = bitcast <2 x i64> %y to <8 x i16>               ; <<8 x i16>> [#uses=1]
+       %tmp9 = add <8 x i16> %tmp8, %tmp6              ; <<8 x i16>> [#uses=1]
+       %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64>           ; <<2 x i64>> [#uses=1]
+       ret <2 x i64> %tmp10
+}
+
+
+; The coalescer should commute the add to avoid a copy.
+define <4 x float> @test3(<4 x float> %V) {
+entry:
+        %tmp8 = shufflevector <4 x float> %V, <4 x float> undef,
+                                        <4 x i32> < i32 3, i32 2, i32 1, i32 0 >
+        %add = add <4 x float> %tmp8, %V
+        ret <4 x float> %add
+}
+