Fix typo
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 13 Sep 2014 19:58:27 +0000 (19:58 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 13 Sep 2014 19:58:27 +0000 (19:58 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217730 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/SIShrinkInstructions.cpp

index caf2572c11b230b5331cbfac3993324f7236c825..c33514f719fec3851e07ff9f5256b7f44ede5005 100644 (file)
@@ -213,10 +213,10 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
         unsigned DstReg = MI.getOperand(0).getReg();
         if (TargetRegisterInfo::isVirtualRegister(DstReg)) {
           // VOPC instructions can only write to the VCC register.  We can't
-          // force them to use VCC here, because the register allocator
-          // has trouble with sequences like this, which cause the allocator
-          // to run out of registes if vreg0 and vreg1 belong to the VCCReg
-          // register class:
+          // force them to use VCC here, because the register allocator has
+          // trouble with sequences like this, which cause the allocator to run
+          // out of registers if vreg0 and vreg1 belong to the VCCReg register
+          // class:
           // vreg0 = VOPC;
           // vreg1 = VOPC;
           // S_AND_B64 vreg0, vreg1