Heuristic: If the number of operands in the alias are more than the number of

operands in the aliasee, don't print the alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132963 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
index b4a986ff77f9a41090072ad20c5c1d3fd5a807a6..f7ffb9337ef8c473ddb56be8e474993583eaefbd 100644 (file)
--- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
+++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
@@ -22,7 +22,7 @@ entry:
 ; CHECK: bar:
 ; CHECK: fldt 4(%esp)
 ; CHECK-NEXT: fld      %st(0)
-; CHECK-NEXT: fmul     %st(1), %st(0)
+; CHECK-NEXT: fmul     %st(1)
 ; CHECK-NEXT: fmulp
 ; CHECK-NEXT: ret
 }

diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index fe08559be6f6c435c82907ad2c83332f87d00dee..ca206da2ae36b7f8997e1ff004126e438c7460e4 100644 (file)
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -232,10 +232,10 @@ cmovnzq %rbx, %rax
 
 // rdar://8407928
 // CHECK: inb  $127, %al
-// CHECK: inw  %dx
+// CHECK: inw  %dx, %ax
 // CHECK: outb %al, $127
-// CHECK: outw %dx
-// CHECK: inl  %dx
+// CHECK: outw %ax, %dx
+// CHECK: inl  %dx, %eax
 inb    $0x7f
 inw    %dx
 outb   $0x7f
@@ -244,12 +244,12 @@ inl       %dx
 
 
 // PR8114
-// CHECK: outb %dx
-// CHECK: outb %dx
-// CHECK: outw %dx
-// CHECK: outw %dx
-// CHECK: outl %dx
-// CHECK: outl %dx
+// CHECK: outb %al, %dx
+// CHECK: outb %al, %dx
+// CHECK: outw %ax, %dx
+// CHECK: outw %ax, %dx
+// CHECK: outl %eax, %dx
+// CHECK: outl %eax, %dx
 
 out    %al, (%dx)
 outb   %al, (%dx)
@@ -258,12 +258,12 @@ outw      %ax, (%dx)
 out    %eax, (%dx)
 outl   %eax, (%dx)
 
-// CHECK: inb  %dx
-// CHECK: inb  %dx
-// CHECK: inw  %dx
-// CHECK: inw  %dx
-// CHECK: inl  %dx
-// CHECK: inl  %dx
+// CHECK: inb  %dx, %al
+// CHECK: inb  %dx, %al
+// CHECK: inw  %dx, %ax
+// CHECK: inw  %dx, %ax
+// CHECK: inl  %dx, %eax
+// CHECK: inl  %dx, %eax
 
 in     (%dx), %al
 inb    (%dx), %al
@@ -308,10 +308,10 @@ fucomi
 fucomi %st(2)
 fucomi %st(2), %st
 
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
-// CHECK: fnstsw %ax
+// CHECK: fnstsw
+// CHECK: fnstsw
+// CHECK: fnstsw
+// CHECK: fnstsw
 
 fnstsw
 fnstsw %ax
@@ -457,7 +457,7 @@ cdq   // CHECK: cltd
 // rdar://8456378 and PR7557 - fstsw
 fstsw %ax
 // CHECK: wait
-// CHECK: fnstsw %ax
+// CHECK: fnstsw
 fstsw (%rax)
 // CHECK: wait
 // CHECK: fnstsw (%rax)

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index e6deb6908e0b5f11bfad7f4870f9c5a16dc58009..3eedf10f7cb3e9b213a24f44b4e5238dff48db2e 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -830,10 +830,26 @@ void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
   O << "}\n\n";
 }
 
+static unsigned CountNumOperands(StringRef AsmString) {
+  unsigned NumOps = 0;
+  std::pair<StringRef, StringRef> ASM = AsmString.split(' ');
+
+  while (!ASM.second.empty()) {
+    ++NumOps;
+    ASM = ASM.second.split(' ');
+  }
+
+  return NumOps;
+}
+
+
 void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
   CodeGenTarget Target(Records);
   Record *AsmWriter = Target.getAsmWriter();
 
+  if (!AsmWriter->getValueAsBit("isMCAsmWriter"))
+    return;
+
   O << "\n#ifdef PRINT_ALIAS_INSTR\n";
   O << "#undef PRINT_ALIAS_INSTR\n\n";
 
@@ -842,9 +858,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
   // Emit the method that prints the alias instruction.
   std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
 
-  bool isMC = AsmWriter->getValueAsBit("isMCAsmWriter");
-  const char *MachineInstrClassName = isMC ? "MCInst" : "MachineInstr";
-
   std::vector<Record*> AllInstAliases =
     Records.getAllDerivedDefinitions("InstAlias");
 
@@ -873,13 +886,16 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
     for (std::vector<CodeGenInstAlias*>::iterator
            II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) {
       const CodeGenInstAlias *CGA = *II;
+      unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
+
+      // Don't emit the alias if it has more operands than what it's aliasing.
+      if (LastOpNo < CountNumOperands(CGA->AsmString))
+        continue;
+
       IAPrinter *IAP = new IAPrinter(AWI, CGA->Result->getAsString(),
                                      CGA->AsmString);
-
       IAP->addReqFeatures(CGA->TheDef->getValueAsListOfDefs("Predicates"));
 
-      unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
-
       std::string Cond;
       Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
       IAP->addCond(Cond);
@@ -914,7 +930,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
             }
           } else {
             assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
-            // FIXME: We need to handle these situations.
+            // FIXME: We may need to handle these situations.
             delete IAP;
             IAP = 0;
             CantHandle = true;
@@ -952,7 +968,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
   raw_string_ostream HeaderO(Header);
 
   HeaderO << "bool " << Target.getName() << ClassName
-          << "::printAliasInstr(const " << MachineInstrClassName
+          << "::printAliasInstr(const MCInst"
           << " *MI, raw_ostream &OS) {\n";
 
   std::string Cases;
@@ -995,7 +1011,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
     CasesO.indent(4) << "return false;\n";
   }
 
-  if (CasesO.str().empty() || !isMC) {
+  if (CasesO.str().empty()) {
     O << HeaderO.str();
     O << "  return false;\n";
     O << "}\n\n";