add a note, from PR5100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96490 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index 9efb5a1426a5a87bd4ae5a3b8968efbc03c9a826..57b65cf15d02da95c758a558b849f4c3d84d2610 100644 (file)
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -10,6 +10,8 @@ Reimplement 'select' in terms of 'SEL'.
 * Implement pre/post increment support.  (e.g. PR935)
 * Implement smarter constant generation for binops with large immediates.
 
+A few ARMv6T2 ops should be pattern matched: BFI, SBFX, and UBFX
+
 //===---------------------------------------------------------------------===//
 
 Crazy idea:  Consider code that uses lots of 8-bit or 16-bit values.  By the