- cas_flag prev;
-# if defined(__i386__) || defined(__x86_64__)
- __asm__ __volatile__("lock; cmpxchgl %1,%2"
- : "=a" (prev)
- : "q" (new_value), "m" (*ptr), "0" (old_value)
- : "memory");
-# elif defined(__ia64__)
- MemoryFence();
-# if defined(_ILP32)
- __asm__("zxt4 %1=%1": "=r"(prev) : "0"(prev));
- __asm__ __volatile__("addp4 %1=0,%1;;\n"
- "mov ar.ccv=%[old] ;; cmpxchg 4"
- ".acq %0=[%1],%[new_val],ar.ccv"
- : "=r"(prev) "1"(addr),
- : "=r"(addr), [new_value]"r"(new_value), [old_value]"r"(old_value)
- : "memory");
-# else
- __asm__ __volatile__(
- "mov ar.ccv=%[old] ;; cmpxchg 8"
- ".acq %0=[%1],%[new_val],ar.ccv"
- : "=r"(prev)
- : "r"(ptr), [new_value]"r"(new_value),
- [old_value]"r"(old_value)
- : "memory");
-# endif // defined(_ILP32)
-# elif defined(__alpha__)
- cas_flag was_equal;
- __asm__ __volatile__(
- "1: ldq_l %0,%1\n"
- " cmpeq %0,%4,%2\n"
- " mov %3,%0\n"
- " beq %2,2f\n"
- " stq_c %0,%1\n"
- " beq %0,1b\n"
- "2:\n"
- :"=&r" (prev), "=m" (*ptr), "=&r" (was_equal)
- : "r" (new_value), "Ir" (old_value)
- :"memory");
-#elif defined(__sparc__)
-#error No CAS implementation for SPARC yet.
-#elif defined(__powerpc__) || defined(__ppc__)
- int result = 0;
- __asm__ __volatile__(
- "1:lwarx %0,0,%2\n" /* load and reserve */
- "cmpw %0, %4\n" /* if load is not equal to */
- "bne 2f\n" /* old, fail */
- "stwcx. %3,0,%2\n" /* else store conditional */
- "bne- 1b\n" /* retry if lost reservation */
- "li %1,1\n" /* result = 1; */
- "2:\n"
- : "=&r"(prev), "=&r"(result)
- : "r"(ptr), "r"(new_value), "r"(old_value), "1"(result)
- : "memory", "cc");
-#elif defined(__arm__)
- int result;
- __asm__ __volatile__ (
- "\n"
- "0:\t"
- "ldr %1,[%2] \n\t"
- "mov %0,#0 \n\t"
- "cmp %1,%4 \n\t"
- "bne 1f \n\t"
- "swp %0,%3,[%2] \n\t"
- "cmp %1,%0 \n\t"
- "swpne %1,%0,[%2] \n\t"
- "bne 0b \n\t"
- "mov %0,#1 \n"
- "1:\n\t"
- ""
- : "=&r"(result), "=&r"(prev)
- : "r" ptr), "r" (new_value), "r" (old_value)
- : "cc", "memory");
-#endif // defined(__i386__)
- return prev;