Avoid needlessly casting away const qualifiers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 485eeb56e212447d3490d7484962644a0dcc0e23..144473320a3b4c68b2eaa6e1c1d968beee5b76eb 100644 (file)
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -84,7 +84,7 @@ namespace {
                           unsigned Op, unsigned RegOpcodeField,
                           intptr_t PCAdj = 0);
 
-    unsigned getX86RegNum(unsigned RegNo);
+    unsigned getX86RegNum(unsigned RegNo) const;
     bool isX86_64ExtendedReg(const MachineOperand &MO);
     unsigned determineREX(const MachineInstr &MI);
 
@@ -210,8 +210,8 @@ void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
   MCE.emitWordLE(0); // The relocated value will be added to the displacement
 }
 
-unsigned Emitter::getX86RegNum(unsigned RegNo) {
-  return ((X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo);
+unsigned Emitter::getX86RegNum(unsigned RegNo) const {
+  return ((const X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo);
 }
 
 inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7ff4e556fcf2954cca24651dfe001ce5c51dd363..de1a648b0830c22611fbfc73b7a9414f7348c7e2 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4948,9 +4948,9 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op,
     const unsigned char MOV64ri = TII->getBaseOpcodeFor(X86::MOV64ri);
 
     const unsigned char N86R10 =
-      ((X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R10);
+      ((const X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R10);
     const unsigned char N86R11 =
-      ((X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R11);
+      ((const X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R11);
 
     const unsigned char REX_WB = 0x40 | 0x08 | 0x01; // REX prefix
 
@@ -5038,7 +5038,7 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op,
 
     const unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri);
     const unsigned char N86Reg =
-      ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
+      ((const X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
     OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
                                 Trmp, TrmpAddr, 0);
 

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index cebc10f4f71d1878196020ab7cf8e51a092a7f3f..931df4dcb5022215451bc0cef6a94e63fcd90f1a 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -82,7 +82,7 @@ int X86RegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const {
 // getX86RegNum - This function maps LLVM register identifiers to their X86
 // specific numbering, which is used in various places encoding instructions.
 //
-unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) {
+unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) const {
   switch(RegNo) {
   case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
   case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;

diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index e36d5166c985b6037ed4957bda93a0b680c2678c..02f237d06cbfdd89037bb700bc0fcc41618142b6 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -71,7 +71,7 @@ public:
 
   /// getX86RegNum - Returns the native X86 register number for the given LLVM
   /// register identifier.
-  unsigned getX86RegNum(unsigned RegNo);
+  unsigned getX86RegNum(unsigned RegNo) const;
 
   unsigned getStackAlignment() const { return StackAlign; }