Fix stack alignment in functions with varargs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34532 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 90d02b82cf6f13b399f4e38a25ab3bdbb38e19cb..f573198bae212509012f6a73ad473fbb9d60b436 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -831,13 +831,16 @@ ARMTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
     SSARegMap *RegMap = MF.getSSARegMap();
     MachineFrameInfo *MFI = MF.getFrameInfo();
     ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
     SSARegMap *RegMap = MF.getSSARegMap();
     MachineFrameInfo *MFI = MF.getFrameInfo();
     ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();

-    unsigned VARegSaveSize = (4 - NumGPRs) * 4;
+    unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
+    unsigned VARegSize = (4 - NumGPRs) * 4;
+    unsigned VARegSaveSize = (VARegSize + Align - 1) & ~(Align - 1);

     if (VARegSaveSize) {
       // If this function is vararg, store any remaining integer argument regs
       // to their spots on the stack so that they may be loaded by deferencing
       // the result of va_next.
       AFI->setVarArgsRegSaveSize(VARegSaveSize);
     if (VARegSaveSize) {
       // If this function is vararg, store any remaining integer argument regs
       // to their spots on the stack so that they may be loaded by deferencing
       // the result of va_next.
       AFI->setVarArgsRegSaveSize(VARegSaveSize);

-      VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset);
+      VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset +
+                                                 VARegSaveSize - VARegSize);

       SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
 
       SmallVector<SDOperand, 4> MemOps;
       SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
 
       SmallVector<SDOperand, 4> MemOps;

diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
new file mode 100644 (file)
index 0000000..b9702e5
--- /dev/null
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm &&
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi -disable-fp-elim | grep "add sp, sp, #16" &&
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu -disable-fp-elim | grep "add sp, sp, #12"
+
+define i32 @f(i32 %a, ...) {
+entry:
+       %a_addr = alloca i32            ; <i32*> [#uses=1]
+       %retval = alloca i32, align 4           ; <i32*> [#uses=2]
+       %tmp = alloca i32, align 4              ; <i32*> [#uses=2]
+       "alloca point" = bitcast i32 0 to i32           ; <i32> [#uses=0]
+       store i32 %a, i32* %a_addr
+       store i32 0, i32* %tmp
+       %tmp1 = load i32* %tmp          ; <i32> [#uses=1]
+       store i32 %tmp1, i32* %retval
+       br label %return
+
+return:                ; preds = %entry
+       %retval2 = load i32* %retval            ; <i32> [#uses=1]
+       ret i32 %retval2
+}