Change the set of callee-saved registers for non-MIPS32 architectures specified

in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a
double precision register get saved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132243 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 7674c6def23fa1e63fb21087e5cb7bd5810fe463..c8598ec8ef9072ab3b56668adfc5bb6387707d67 100644 (file)
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -104,12 +104,6 @@ getCalleeSavedRegs(const MachineFunction *MF) const
     Mips::S3, Mips::S2, Mips::S1, Mips::S0, 0
   };
 
-  static const unsigned BitMode32CalleeSavedRegs[] = {
-    Mips::F30, Mips::F28, Mips::F26, Mips::F24, Mips::F22, Mips::F20,
-    Mips::RA, Mips::FP, Mips::S7, Mips::S6, Mips::S5, Mips::S4,
-    Mips::S3, Mips::S2, Mips::S1, Mips::S0, 0
-  };
-
   static const unsigned Mips32CalleeSavedRegs[] = {
     Mips::D15, Mips::D14, Mips::D13, Mips::D12, Mips::D11, Mips::D10,
     Mips::RA, Mips::FP, Mips::S7, Mips::S6, Mips::S5, Mips::S4,
@@ -118,10 +112,8 @@ getCalleeSavedRegs(const MachineFunction *MF) const
 
   if (Subtarget.isSingleFloat())
     return SingleFloatOnlyCalleeSavedRegs;
-  else if (Subtarget.isMips32())
-    return Mips32CalleeSavedRegs;
   else
-    return BitMode32CalleeSavedRegs;
+    return Mips32CalleeSavedRegs;
 }
 
 BitVector MipsRegisterInfo::