Completely eliminate the per-machine-instruction regsUsed set.

This substantially shrinks the size of each machine instruction, which should
make allocation faster and the cache footprint of the machine code lighter.

Here are some timings for code generation of the larger benchmarks we have.
This are timings of code generation phases of the X86 JIT, when compiled in
debug mode:

		Before	After	Diff
164.gzip:
  InstSel	0.0878	0.0722	-21.6%
  RegAlloc	0.2031	0.1757	-15.6%
  TOTAL		0.5585	0.4999	-11.7%
Ptrdist-bc:
  InstSel	0.0878	0.0722	-21.6%
  RegAlloc	0.2070	0.1933	- 7.1%
  TOTAL		0.6972	0.6464	- 7.9%
197.parser:
  InstSel	0.2148	0.2148	- 0.0%
  RegAlloc	0.4941	0.4277	-15.5%
  TOTAL		1.3749	1.2851	- 7.0%
175.vpr:
  InstSel	0.2519	0.2109	-19.4%
  RegAlloc	0.5976	0.5663	- 5.5%
  TOTAL		1.6933	1.6347	- 3.5%
254.gap:
  InstSel	1.1328	0.9921	-14.2%
  RegAlloc	2.6933	2.4804	- 8.6%
  TOTAL		7.7871	7.2499	- 7.4%

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7622 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index faa213bf26b5af48156c2e8ca8050203709f1f91..662f11e531a15ea9f34246097b6ab84a45b932d4 100644 (file)
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -346,10 +346,6 @@ class MachineInstr {
   std::vector<MachineOperand> operands; // the operands
   unsigned numImplicitRefs;             // number of implicit operands
 
-  // regsUsed - all machine registers used for this instruction, including regs
-  // used to save values across the instruction.  This is a bitset of registers.
-  std::set<int>    regsUsed;
-
   // OperandComplete - Return true if it's illegal to add a new operand
   bool OperandsComplete() const;
 
@@ -438,17 +434,6 @@ public:
                          MachineOperand::MO_VirtualRegister, V);
   }
 
-  //
-  // Information about registers used in this instruction.
-  // 
-  const std::set<int> &getRegsUsed() const {
-    return regsUsed;
-  }
-  void insertUsedReg(unsigned Reg) {
-    assert(((int) Reg) >= 0 && "Invalid register being marked as used");
-    regsUsed.insert((int) Reg);
-  }
-
   //
   // Debugging support
   //