Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't
authorBill Wendling <isanbard@gmail.com>
Fri, 6 Aug 2010 01:36:09 +0000 (01:36 +0000)
committerBill Wendling <isanbard@gmail.com>
Fri, 6 Aug 2010 01:36:09 +0000 (01:36 +0000)
need the Compare flag after all.

--- Reverse-merging r109901 into '.':
U    include/llvm/Target/TargetInstrDesc.h
U    include/llvm/Target/Target.td
U    utils/TableGen/InstrInfoEmitter.cpp
U    utils/TableGen/CodeGenInstruction.cpp
U    utils/TableGen/CodeGenInstruction.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110424 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Target/Target.td
include/llvm/Target/TargetInstrDesc.h
utils/TableGen/CodeGenInstruction.cpp
utils/TableGen/CodeGenInstruction.h
utils/TableGen/InstrInfoEmitter.cpp

index 809e088e2b0c10a1a9c540b03743343901dce31a..ad1a816a95cd528bc4777bd8da928b1f3767c7df 100644 (file)
@@ -198,7 +198,6 @@ class Instruction {
   bit isReturn     = 0;     // Is this instruction a return instruction?
   bit isBranch     = 0;     // Is this instruction a branch instruction?
   bit isIndirectBranch = 0; // Is this instruction an indirect branch?
-  bit isCompare    = 0;     // Is this instruction a comparison instruction?
   bit isBarrier    = 0;     // Can control flow fall through this instruction?
   bit isCall       = 0;     // Is this instruction a call instruction?
   bit canFoldAsLoad = 0;    // Can this be folded as a simple memory operand?
index 6a08e8f24c05cf2e0d9523f39444091b7a92fa86..8f0a6cb1a68e209f009d90a176a47cc10e10fb9a 100644 (file)
@@ -105,7 +105,6 @@ namespace TID {
     IndirectBranch,
     Predicable,
     NotDuplicable,
-    Compare,
     DelaySlot,
     FoldableAsLoad,
     MayLoad,
@@ -316,7 +315,7 @@ public:
   bool isIndirectBranch() const {
     return Flags & (1 << TID::IndirectBranch);
   }
-
+  
   /// isConditionalBranch - Return true if this is a branch which may fall
   /// through to the next instruction or may transfer control flow to some other
   /// block.  The TargetInstrInfo::AnalyzeBranch method can be used to get more
@@ -341,11 +340,6 @@ public:
     return Flags & (1 << TID::Predicable);
   }
   
-  /// isCompare - Return true if this instruction is a comparison.
-  bool isCompare() const {
-    return Flags & (1 << TID::Compare);
-  }
-  
   /// isNotDuplicable - Return true if this instruction cannot be safely
   /// duplicated.  For example, if the instruction has a unique labels attached
   /// to it, duplicating it would cause multiple definition errors.
index 01a1fe11f5318f0218b04a30cface0830f4290d6..35b54a5427171994713e9fc548b4782bfc92bf76 100644 (file)
@@ -102,7 +102,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   isReturn     = R->getValueAsBit("isReturn");
   isBranch     = R->getValueAsBit("isBranch");
   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
-  isCompare    = R->getValueAsBit("isCompare");
   isBarrier    = R->getValueAsBit("isBarrier");
   isCall       = R->getValueAsBit("isCall");
   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");
index b02d0d38f975dbae0ef2604537e369351eea4ce7..946c2d01a52fc00bcbf32ab484cc7472163c99c9 100644 (file)
@@ -123,7 +123,6 @@ namespace llvm {
     bool isReturn;
     bool isBranch;
     bool isIndirectBranch;
-    bool isCompare;
     bool isBarrier;
     bool isCall;
     bool canFoldAsLoad;
index 4d3aa5e621c9c749347ed86d1d66fd6ce756019f..f28af1589d65917c136cf8f511f9c7e5543acb68 100644 (file)
@@ -270,7 +270,6 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.isReturn)           OS << "|(1<<TID::Return)";
   if (Inst.isBranch)           OS << "|(1<<TID::Branch)";
   if (Inst.isIndirectBranch)   OS << "|(1<<TID::IndirectBranch)";
-  if (Inst.isCompare)          OS << "|(1<<TID::Compare)";
   if (Inst.isBarrier)          OS << "|(1<<TID::Barrier)";
   if (Inst.hasDelaySlot)       OS << "|(1<<TID::DelaySlot)";
   if (Inst.isCall)             OS << "|(1<<TID::Call)";