#ifndef X86DISASSEMBLERDECODER_H
#define X86DISASSEMBLERDECODER_H
-#define INSTRUCTION_SPECIFIER_FIELDS \
- uint16_t operands;
-
#define INSTRUCTION_IDS \
uint16_t instructionIDs;
*/
typedef void (*dlog_t)(void* arg, const char *log);
+/*
+ * The specification for how to extract and interpret a full instruction and
+ * its operands.
+ */
+struct InstructionSpecifier {
+ uint16_t operands;
+};
+
/*
* The x86 internal instruction, which is produced by the decoder.
*/
#define X86_MAX_OPERANDS 5
-/*
- * The specification for how to extract and interpret a full instruction and
- * its operands.
- */
-struct InstructionSpecifier {
- /* The macro below must be defined wherever this file is included. */
- INSTRUCTION_SPECIFIER_FIELDS
-};
-
/*
* Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
* are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
#include <string.h>
#include <string>
-#define INSTRUCTION_SPECIFIER_FIELDS \
- struct OperandSpecifier operands[X86_MAX_OPERANDS]; \
- InstructionContext insnContext; \
- std::string name; \
- \
- InstructionSpecifier() { \
- insnContext = IC; \
- name = ""; \
- memset(operands, 0, sizeof(operands)); \
- }
-
#define INSTRUCTION_IDS \
InstrUID instructionIDs[256];
#undef INSTRUCTION_SPECIFIER_FIELDS
#undef INSTRUCTION_IDS
+struct InstructionSpecifier {
+ llvm::X86Disassembler::OperandSpecifier operands[X86_MAX_OPERANDS];
+ llvm::X86Disassembler::InstructionContext insnContext;
+ std::string name;
+
+ InstructionSpecifier() {
+ insnContext = llvm::X86Disassembler::IC;
+ name = "";
+ memset(operands, 0, sizeof(operands));
+ }
+};
+
#endif