Extend the (abi-irrelevant) return convention to be able to return more than two...

integer registers.  This is already supported by the fastcc convention, but it doesn't
hurt to support it in the standard conventions as well.

In cases where we can cheat at the calling convention, this allows us to avoid returning
things through memory in more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157698 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td
index b240742f17040c6b8f9c718973c3833cd2255e38..aa97b8b36b1a249b91e393d8ef07a79cb988f956 100644 (file)
--- a/lib/Target/X86/X86CallingConv.td
+++ b/lib/Target/X86/X86CallingConv.td
@@ -29,10 +29,13 @@ def RetCC_X86Common : CallingConv<[
   // up in AX and AH, which overlap. Front-ends wishing to conform to the ABI
   // for functions that return two i8 values are currently expected to pack the
   // values into an i16 (which uses AX, and thus AL:AH).
-  CCIfType<[i8] , CCAssignToReg<[AL, DL]>>,
-  CCIfType<[i16], CCAssignToReg<[AX, DX]>>,
-  CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>,
-  CCIfType<[i64], CCAssignToReg<[RAX, RDX]>>,
+  //
+  // For code that doesn't care about the ABI, we allow returning more than two
+  // integer values in registers.
+  CCIfType<[i8] , CCAssignToReg<[AL, DL, CL]>>,
+  CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
+  CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
+  CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R11]>>,
 
   // Vector types are returned in XMM0 and XMM1, when they fit.  XMM2 and XMM3
   // can only be used by ABI non-compliant code. If the target doesn't have XMM

diff --git a/test/CodeGen/X86/pass-four.ll b/test/CodeGen/X86/pass-four.ll
new file mode 100644 (file)
index 0000000..fd4e1e9
--- /dev/null
+++ b/test/CodeGen/X86/pass-four.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin11.3.0"
+
+
+define { i8*, i64, i64*, i64 } @copy_4(i8* %a, i64 %b, i64* %c, i64 %d) nounwind {
+entry:
+  %0 = insertvalue { i8*, i64, i64*, i64 } undef, i8* %a, 0
+  %1 = insertvalue { i8*, i64, i64*, i64 } %0, i64 %b, 1
+  %2 = insertvalue { i8*, i64, i64*, i64 } %1, i64* %c, 2
+  %3 = insertvalue { i8*, i64, i64*, i64 } %2, i64 %d, 3
+  ret { i8*, i64, i64*, i64 } %3
+}
+
+; CHECK: copy_4:
+; CHECK-NOT: (%rdi)
+; CHECK: ret