[Hexagon] Organizing tests and adding a few missing jump instruction encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227498 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td
index c540972a90f459fbe554237fafca71cead7b13a9..f5c69653f3a409c248d0f4d4e9bedfb9b4780a85 100644 (file)
--- a/lib/Target/Hexagon/HexagonInstrInfo.td
+++ b/lib/Target/Hexagon/HexagonInstrInfo.td
@@ -4058,6 +4058,38 @@ defm J2_ploop2s : SPLOOP_ri<"2", 0b10>;
 defm J2_ploop3s : SPLOOP_ri<"3", 0b11>;
 }
 
+
+// if (Rs[!>=<]=#0) jump:[t/nt]
+let Defs = [PC], isPredicated = 1, isBranch = 1, hasSideEffects = 0,
+    hasSideEffects = 0 in
+class J2_jump_0_Base<string compare, bit isTak, bits<2> op>
+  : CRInst <(outs), (ins IntRegs:$Rs, brtarget:$r13_2),
+  "if ($Rs"#compare#"#0) jump"#!if(isTak, ":t", ":nt")#" $r13_2" > {
+    bits<5> Rs;
+    bits<15> r13_2;
+
+    let IClass = 0b0110;
+
+    let Inst{27-24} = 0b0001;
+    let Inst{23-22} = op;
+    let Inst{12} = isTak;
+    let Inst{21} = r13_2{14};
+    let Inst{20-16} = Rs;
+    let Inst{11-1} = r13_2{12-2};
+    let Inst{13} = r13_2{13};
+  }
+
+multiclass J2_jump_compare_0<string compare, bits<2> op> {
+  def NAME    : J2_jump_0_Base<compare, 0, op>;
+  def NAME#pt : J2_jump_0_Base<compare, 1, op>;
+}
+let isCodeGenOnly = 0 in {
+defm J2_jumprz    : J2_jump_compare_0<"!=", 0b00>;
+defm J2_jumprgtez : J2_jump_compare_0<">=", 0b01>;
+defm J2_jumprnz   : J2_jump_compare_0<"==", 0b10>;
+defm J2_jumprltez : J2_jump_compare_0<"<=", 0b11>;
+}
+
 // Transfer to/from Control/GPR Guest/GPR
 let hasSideEffects = 0 in
 class TFR_CR_RS_base<RegisterClass CTRC, RegisterClass RC, bit isDouble>

diff --git a/lib/Target/Hexagon/HexagonInstrInfoV4.td b/lib/Target/Hexagon/HexagonInstrInfoV4.td
index c2997d5ca8733aeb70e567fb994bb3c879bbd60e..f25c981cd32dec14d188a7491b4bae961be5fdd5 100644 (file)
--- a/lib/Target/Hexagon/HexagonInstrInfoV4.td
+++ b/lib/Target/Hexagon/HexagonInstrInfoV4.td
@@ -1569,7 +1569,7 @@ def J4_hintjumpr: JRInst <
 // PC-relative add
 let hasNewValue = 1, isExtendable = 1, opExtendable = 1,
     isExtentSigned = 0, opExtentBits = 6, hasSideEffects = 0,
-    Uses = [PC], validSubTargets = HasV4SubT in
+    Uses = [PC], validSubTargets = HasV4SubT, isCodeGenOnly = 0 in
 def C4_addipc : CRInst <(outs IntRegs:$Rd), (ins u6Ext:$u6),
   "$Rd = add(pc, #$u6)", [], "", CR_tc_2_SLOT3 > {
     bits<5> Rd;

diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt
index 42dc373ac054812ef518aac39806e12bd55f1647..4dde7df0759af5c1b671b87041c0e2283d0ce566 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_alu.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
 # Hexagon Programmer's Reference Manual 11.1.1 ALU32/ALU
 
 # Add

diff --git a/test/MC/Disassembler/Hexagon/alu32_perm.txt b/test/MC/Disassembler/Hexagon/alu32_perm.txt
index 98a5d3010077a69505d6704d8fd1009030ea7665..a2953506c599e896cd029e36ac0f2a9bc9f155b5 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_perm.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_perm.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
 # Hexagon Programmer's Reference Manual 11.1.2 ALU32/PERM
 
 # Combine words in to doublewords

diff --git a/test/MC/Disassembler/Hexagon/alu32_pred.txt b/test/MC/Disassembler/Hexagon/alu32_pred.txt
index 6c28c3237ee6517419c72aa64195be475a8512b5..084b39d8cbf577d1ee3b45296550f459c6d91d0d 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_pred.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_pred.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
 # Hexagon Programmer's Reference Manual 11.1.3 ALU32/PRED
 
 # Conditional add

diff --git a/test/MC/Disassembler/Hexagon/cr.txt b/test/MC/Disassembler/Hexagon/cr.txt
index 89157156cffd5caaee51acba2e810ffadbdd196b..6cf2b5fda39994b1f0eab734b74f1d82f26f4c28 100644 (file)
--- a/test/MC/Disassembler/Hexagon/cr.txt
+++ b/test/MC/Disassembler/Hexagon/cr.txt
@@ -1,13 +1,19 @@
 # RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.2 CR
 
+# Corner detection acceleration
 0x93 0xe1 0x12 0x6b
 # CHECK: p3 = !fastcorner9(p2, p1)
 0x91 0xe3 0x02 0x6b
 # CHECK: p1 = fastcorner9(p2, p3)
+
+# Logical reductions on predicates
 0x01 0xc0 0x82 0x6b
 # CHECK: p1 = any8(p2)
 0x01 0xc0 0xa2 0x6b
 # CHECK: p1 = all8(p2)
+
+# Looping instructions
 0x08 0xc4 0x15 0x60
 # CHECK: loop0
 0x08 0xc4 0x35 0x60
@@ -16,6 +22,12 @@
 # CHECK: loop0
 0x68 0xc4 0x20 0x69
 # CHECK: loop1
+
+# Add to PC
+0x91 0xca 0x49 0x6a
+# CHECK: r17 = add(pc, #21)
+
+# Pipelined loop instructions
 0x08 0xc4 0xb5 0x60
 # CHECK: p3 = sp1loop0
 0x08 0xc4 0xd5 0x60
@@ -28,23 +40,21 @@
 # CHECK: p3 = sp2loop0
 0xa9 0xc4 0xe0 0x69
 # CHECK: p3 = sp3loop0
+
+# Logical operations on predicates
 0x01 0xc3 0x02 0x6b
 # CHECK: p1 = and(p3, p2)
 0xc1 0xc3 0x12 0x6b
 # CHECK: p1 = and(p2, and(p3, p3))
-0x01 0xc3 0x62 0x6b
-# CHECK: p1 = and(p3, !p2)
 0x01 0xc3 0x22 0x6b
 # CHECK: p1 = or(p3, p2)
 0xc1 0xc3 0x32 0x6b
 # CHECK: p1 = and(p2, or(p3, p3))
-0x01 0xc3 0xe2 0x6b
-# CHECK: p1 = or(p3, !p2)
-0x01 0xc2 0x43 0x6b
-# CHECK: p1 = xor(p3, p2)
+0x01 0xc3 0x42 0x6b
+# CHECK: p1 = xor(p2, p3)
 0xc1 0xc3 0x52 0x6b
 # CHECK: p1 = or(p2, and(p3, p3))
-0x01 0xc2 0x63 0x6b 
+0x01 0xc2 0x63 0x6b
 # CHECK: p1 = and(p2, !p3)
 0xc1 0xc3 0x72 0x6b
 # CHECK: p1 = or(p2, or(p3, p3))
@@ -60,6 +70,8 @@
 # CHECK: p1 = or(p2, !p3)
 0xc1 0xc3 0xf2 0x6b
 # CHECK: p1 = or(p2, or(p3, !p3))
+
+# User control register transfer
 0x0d 0xc0 0x35 0x62
 # CHECK: cs1 = r21
 0x11 0xc0 0x0d 0x6a

diff --git a/test/MC/Disassembler/Hexagon/j.txt b/test/MC/Disassembler/Hexagon/j.txt
index c14d0341547c362c96968889a34053b61bc73137..0c2cc7a4cf34ebfbe75ec9b7dd9eb1551641f533 100644 (file)
--- a/test/MC/Disassembler/Hexagon/j.txt
+++ b/test/MC/Disassembler/Hexagon/j.txt
@@ -1,11 +1,15 @@
 # RUN: llvm-mc -triple hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.4 J
 
+# Call subroutine
 0x22 0xc0 0x00 0x5a
 # CHECK: call
 0x22 0xc3 0x00 0x5d
 # CHECK: if (p3) call
 0x22 0xc3 0x20 0x5d
 # CHECK: if (!p3) call
+
+# Compare and jump
 0x00 0xc0 0x89 0x11
 # CHECK: p0 = cmp.eq(r9,#-1); if (p0.new) jump:nt
 0x00 0xc1 0x89 0x11
@@ -150,6 +154,48 @@
 # CHECK: p0 = cmp.gtu(r9, r13); if (!p0.new) jump:t
 0x00 0xfd 0x49 0x15
 # CHECK: p1 = cmp.gtu(r9, r13); if (!p1.new) jump:t
+
+# Jump to address
+0x22 0xc0 0x00 0x58
+# CHECK: jump
+0x22 0xc3 0x00 0x5c
+# CHECK: if (p3) jump
+0x22 0xc3 0x20 0x5c
+# CHECK: if (!p3) jump
+
+# Jump to address conditioned on new predicate
+0x03 0x40 0x45 0x85 0x00 0xcb 0x00 0x5c
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) jump:nt
+0x03 0x40 0x45 0x85 0x00 0xdb 0x00 0x5c
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) jump:t
+0x03 0x40 0x45 0x85 0x00 0xcb 0x20 0x5c
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) jump:nt
+0x03 0x40 0x45 0x85 0x00 0xdb 0x20 0x5c
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) jump:t
+
+# Jump to address conditioned on register value
+0x00 0xc0 0x11 0x61
+# CHECK: if (r17!=#0) jump:nt
+0x00 0xd0 0x11 0x61
+# CHECK: if (r17!=#0) jump:t
+0x00 0xc0 0x51 0x61
+# CHECK: if (r17>=#0) jump:nt
+0x00 0xd0 0x51 0x61
+# CHECK: if (r17>=#0) jump:t
+0x00 0xc0 0x91 0x61
+# CHECK: if (r17==#0) jump:nt
+0x00 0xd0 0x91 0x61
+# CHECK: if (r17==#0) jump:t
+0x00 0xc0 0xd1 0x61
+# CHECK: if (r17<=#0) jump:nt
+0x00 0xd0 0xd1 0x61
+# CHECK: if (r17<=#0) jump:t
+
+# Transfer and jump
 0x00 0xd5 0x09 0x16
 # CHECK: r9 = #21 ; jump
 0x00 0xc9 0x0d 0x17