Fix a bug where an incorrect bit mask would be generated if a target's last asm

string began at a power of 2 in the string index.  For example, if "ret" started
at position 16, the ret instruction would be assigned code 16, but the mask would be AsmChars[] + Code & 15, not Code & 31.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49433 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 4ba22758a600e17658e2a60ab9f5677e945d8fc8..8fbb2cfbb61c887136cc68d75dcedf7f43f32715 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -536,7 +536,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
   }
   
   // Figure out how many bits we used for the string index.
-  unsigned AsmStrBits = Log2_32_Ceil(MaxStringIdx);
+  unsigned AsmStrBits = Log2_32_Ceil(MaxStringIdx+1);
   
   // To reduce code size, we compactify common instructions into a few bits
   // in the opcode-indexed table.