Test commit. Updated comment.
authorMatheus Almeida <matheus.almeida@imgtec.com>
Tue, 1 Oct 2013 12:53:00 +0000 (12:53 +0000)
committerMatheus Almeida <matheus.almeida@imgtec.com>
Tue, 1 Oct 2013 12:53:00 +0000 (12:53 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191748 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsInstrInfo.cpp

index eae05a38af6189bf0dfde8dd48dced82e30483eb..ceb8eeae9f5554b376bfb61db25748aac1a789eb 100644 (file)
@@ -219,7 +219,7 @@ AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
 
   // If there is only one terminator instruction, process it.
   if (!SecondLastOpc) {
-    // Unconditional branch
+    // Unconditional branch.
     if (LastOpc == UncondBrOpc) {
       TBB = LastInst->getOperand(0).getMBB();
       return BT_Uncond;