make sure bit_converts are expanded

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24978 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index cbaa283326ad8b63c6493e6f4a745fcd0ff1be3a..565eb0a02562432a263b6244cdefb3f76632e754 100644 (file)
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -88,6 +88,9 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
   setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand);
   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
 
+  setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand);
+  setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand);
+
   // PowerPC does not have truncstore for i1.
   setOperationAction(ISD::TRUNCSTORE, MVT::i1, Promote);
 

diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 3c307d34c32ef87e116b65695c25ce93c199dfa7..ea434ea8f718428d98e5c2f4fc1f41d8012a6db5 100644 (file)
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -108,6 +108,9 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
   
+  setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand);
+  setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand);
+  
   // Turn FP extload into load/fextend
   setOperationAction(ISD::EXTLOAD, MVT::f32, Expand);
   

diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
index 3c307d34c32ef87e116b65695c25ce93c199dfa7..ea434ea8f718428d98e5c2f4fc1f41d8012a6db5 100644 (file)
--- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
+++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
@@ -108,6 +108,9 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
   setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
   
+  setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand);
+  setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand);
+  
   // Turn FP extload into load/fextend
   setOperationAction(ISD::EXTLOAD, MVT::f32, Expand);