Make some ugly hacks for inline asm operands which name a specific register a bit...
authorEli Friedman <eli.friedman@gmail.com>
Mon, 25 Jun 2012 23:42:33 +0000 (23:42 +0000)
committerEli Friedman <eli.friedman@gmail.com>
Mon, 25 Jun 2012 23:42:33 +0000 (23:42 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159176 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll [deleted file]
test/CodeGen/X86/asm-reg-type-mismatch.ll [new file with mode: 0644]

index 8ee64408fbdcd9733990e8300f718ce74b2fda50..ee7a6352732895fd1f5ff9173ba51a9db2dd957d 100644 (file)
@@ -16030,12 +16030,15 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
     // wrong class.  This can happen with constraints like {xmm0} where the
     // target independent register mapper will just pick the first match it can
     // find, ignoring the required type.
-    if (VT == MVT::f32)
+
+    if (VT == MVT::f32 || VT == MVT::i32)
       Res.second = &X86::FR32RegClass;
-    else if (VT == MVT::f64)
+    else if (VT == MVT::f64 || VT == MVT::i64)
       Res.second = &X86::FR64RegClass;
     else if (X86::VR128RegClass.hasType(VT))
       Res.second = &X86::VR128RegClass;
+    else if (X86::VR256RegClass.hasType(VT))
+      Res.second = &X86::VR256RegClass;
   }
 
   return Res;
diff --git a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll
deleted file mode 100644 (file)
index f0d46a0..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -mcpu=core2 | grep xorps | count 2
-; RUN: llc < %s -mcpu=core2 | not grep movap
-; PR2715
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-unknown-linux-gnu"
-       %struct.XPTTypeDescriptorPrefix = type { i8 }
-       %struct.nsISupports = type { i32 (...)** }
-       %struct.nsXPTCMiniVariant = type { %"struct.nsXPTCMiniVariant::._39" }
-       %"struct.nsXPTCMiniVariant::._39" = type { i64 }
-       %struct.nsXPTCVariant = type { %struct.nsXPTCMiniVariant, i8*, %struct.nsXPTType, i8 }
-       %struct.nsXPTType = type { %struct.XPTTypeDescriptorPrefix }
-
-define i32 @XPTC_InvokeByIndex(%struct.nsISupports* %that, i32 %methodIndex, i32 %paramCount, %struct.nsXPTCVariant* %params) nounwind {
-entry:
-       call void asm sideeffect "", "{xmm0},{xmm1},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},~{dirflag},~{fpsr},~{flags}"( double undef, double undef, double undef, double 1.0, double undef, double 0.0, double undef, double 0.0 ) nounwind
-       ret i32 0
-}
diff --git a/test/CodeGen/X86/asm-reg-type-mismatch.ll b/test/CodeGen/X86/asm-reg-type-mismatch.ll
new file mode 100644 (file)
index 0000000..47accdb
--- /dev/null
@@ -0,0 +1,31 @@
+; RUN: llc < %s -mcpu=core2 | FileCheck %s
+; PR2715
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-unknown-linux-gnu"
+       %struct.XPTTypeDescriptorPrefix = type { i8 }
+       %struct.nsISupports = type { i32 (...)** }
+       %struct.nsXPTCMiniVariant = type { %"struct.nsXPTCMiniVariant::._39" }
+       %"struct.nsXPTCMiniVariant::._39" = type { i64 }
+       %struct.nsXPTCVariant = type { %struct.nsXPTCMiniVariant, i8*, %struct.nsXPTType, i8 }
+       %struct.nsXPTType = type { %struct.XPTTypeDescriptorPrefix }
+
+define i32 @test1(%struct.nsISupports* %that, i32 %methodIndex, i32 %paramCount, %struct.nsXPTCVariant* %params) nounwind {
+entry:
+       call void asm sideeffect "", "{xmm0},{xmm1},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},~{dirflag},~{fpsr},~{flags}"( double undef, double undef, double undef, double 1.0, double undef, double 0.0, double undef, double 0.0 ) nounwind
+       ret i32 0
+       ; CHECK: test1
+       ; CHECK-NOT: movap
+       ; CHECK: xorps
+       ; CHECK: xorps
+       ; CHECK-NOT: movap
+}
+
+define i64 @test2() nounwind {
+entry:
+  %0 = tail call i64 asm sideeffect "movq $1, $0", "={xmm7},*m,~{dirflag},~{fpsr},~{flags}"(i64* null) nounwind
+  ret i64 %0
+  ; CHECK: test2
+       ; CHECK: movq {{.*}}, %xmm7
+       ; CHECK: movd %xmm7, %rax
+}