Use x86 specific MOVSHDUP node and add more patterns to match it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112657 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 1b18eb60d1398de334e3ce0a50eedcf836466b20..d9207d9e06f20db80da959a93eddba1a9194fcae 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2586,6 +2586,7 @@ static bool isTargetShuffle(unsigned Opcode) {
   case X86ISD::SHUFPS:
   case X86ISD::MOVLHPS:
   case X86ISD::MOVHLPS:
+  case X86ISD::MOVSHDUP:
   case X86ISD::MOVSS:
   case X86ISD::MOVSD:
   case X86ISD::PUNPCKLDQ:
@@ -2594,6 +2595,17 @@ static bool isTargetShuffle(unsigned Opcode) {
   return false;
 }
 
+static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT,
+                                               SDValue V1, SelectionDAG &DAG) {
+  switch(Opc) {
+  default: llvm_unreachable("Unknown x86 shuffle node");
+  case X86ISD::MOVSHDUP:
+    return DAG.getNode(Opc, dl, VT, V1);
+  }
+
+  return SDValue();
+}
+
 static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT,
                           SDValue V1, unsigned TargetMask, SelectionDAG &DAG) {
   switch(Opc) {
@@ -5053,6 +5065,7 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
   bool V1IsSplat = false;
   bool V2IsSplat = false;
   bool HasSSE2 = Subtarget->hasSSE2() || Subtarget->hasAVX();
+  bool HasSSE3 = Subtarget->hasSSE3() || Subtarget->hasAVX();
   MachineFunction &MF = DAG.getMachineFunction();
   bool OptForSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
 
@@ -5152,8 +5165,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
     if (X86::isMOVHLPSMask(SVOp))
       return getMOVHighToLow(Op, dl, DAG);
 
-    if (X86::isMOVSHDUPMask(SVOp) ||
-        X86::isMOVSLDUPMask(SVOp) ||
+    if (X86::isMOVSHDUPMask(SVOp) && HasSSE3 && V2IsUndef && NumElems == 4)
+      return getTargetShuffleNode(X86ISD::MOVSHDUP, dl, VT, V1, DAG);
+
+    if (X86::isMOVSLDUPMask(SVOp) ||
         X86::isMOVHLPSMask(SVOp) ||
         X86::isMOVLPMask(SVOp))
       return Op;

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index e9f054ba34aaa701b2a1ffbd662b8620edb77aa0..65ec8c292bb02c5510fc346dcf17ba15894b9a3c 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -5847,12 +5847,12 @@ def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)),
 // Shuffle with MOVSHDUP
 def : Pat<(v4i32 (X86Movshdup VR128:$src)),
           (MOVSHDUPrr VR128:$src)>;
-def : Pat<(v4i32 (X86MovshdupLd addr:$src)),
+def : Pat<(v4i32 (X86Movshdup (bc_v4i32 (memopv2i64 addr:$src)))),
           (MOVSHDUPrm addr:$src)>;
 
 def : Pat<(v4f32 (X86Movshdup VR128:$src)),
           (MOVSHDUPrr VR128:$src)>;
-def : Pat<(v4f32 (X86MovshdupLd addr:$src)),
+def : Pat<(X86Movshdup (memopv4f32 addr:$src)),
           (MOVSHDUPrm addr:$src)>;
 
 // Shuffle with MOVSLDUP