case PPC::IMPLICIT_DEF: // no asm emitted
return 0;
default:
- return 4; // PowerPC instructions are all 4 bytes
+ break;
}
+ return 4; // PowerPC instructions are all 4 bytes
}
virtual bool runOnMachineFunction(MachineFunction &Fn) {
SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg,
MachineInstr &MI) {
const SparcV9RegInfo &RI = *TM.getRegInfo();
- unsigned regClass, regType = RI.getRegType(fakeReg);
+ unsigned regClass = 0, regType = RI.getRegType(fakeReg);
// At least map fakeReg into its class
fakeReg = RI.getClassRegNum(fakeReg, regClass);
return BinaryOperator::createNot(Op1);
// C - ~X == X + (1+C)
- Value *X;
+ Value *X = 0;
if (match(Op1, m_Not(m_Value(X))))
return BinaryOperator::createAdd(X,
ConstantExpr::getAdd(C, ConstantInt::get(I.getType(), 1)));
ConstantExpr::getNeg(DivRHS));
// X - X*C --> X * (1-C)
- ConstantInt *C2;
+ ConstantInt *C2 = 0;
if (dyn_castFoldableMul(Op1I, C2) == Op0) {
Constant *CP1 =
ConstantExpr::getSub(ConstantInt::get(I.getType(), 1), C2);
Instruction *InstCombiner::visitBranchInst(BranchInst &BI) {
// Change br (not X), label True, label False to: br X, label False, True
- Value *X;
+ Value *X = 0;
BasicBlock *TrueDest;
BasicBlock *FalseDest;
if (match(&BI, m_Br(m_Not(m_Value(X)), TrueDest, FalseDest)) &&