-//===------- X86ExpandPseudo.cpp - Expand pseudo instructions -------------===//\r
-//\r
-// The LLVM Compiler Infrastructure\r
-//\r
-// This file is distributed under the University of Illinois Open Source\r
-// License. See LICENSE.TXT for details.\r
-//\r
-//===----------------------------------------------------------------------===//\r
-//\r
-// This file contains a pass that expands pseudo instructions into target\r
-// instructions to allow proper scheduling, if-conversion, other late\r
-// optimizations, or simply the encoding of the instructions.\r
-//\r
-//===----------------------------------------------------------------------===//\r
-\r
-#include "X86.h"\r
-#include "X86FrameLowering.h"\r
-#include "X86InstrBuilder.h"\r
-#include "X86InstrInfo.h"\r
-#include "X86MachineFunctionInfo.h"\r
-#include "X86Subtarget.h"\r
-#include "llvm/Analysis/EHPersonalities.h"\r
-#include "llvm/CodeGen/MachineFunctionPass.h"\r
-#include "llvm/CodeGen/MachineInstrBuilder.h"\r
-#include "llvm/CodeGen/Passes.h" // For IDs of passes that are preserved.\r
-#include "llvm/IR/GlobalValue.h"\r
-using namespace llvm;\r
-\r
-#define DEBUG_TYPE "x86-pseudo"\r
-\r
-namespace {\r
-class X86ExpandPseudo : public MachineFunctionPass {\r
-public:\r
- static char ID;\r
- X86ExpandPseudo() : MachineFunctionPass(ID) {}\r
-\r
- void getAnalysisUsage(AnalysisUsage &AU) const override {\r
- AU.setPreservesCFG();\r
- AU.addPreservedID(MachineLoopInfoID);\r
- AU.addPreservedID(MachineDominatorsID);\r
- MachineFunctionPass::getAnalysisUsage(AU);\r
- }\r
-\r
- const X86Subtarget *STI;\r
- const X86InstrInfo *TII;\r
- const X86RegisterInfo *TRI;\r
- const X86FrameLowering *X86FL;\r
-\r
- bool runOnMachineFunction(MachineFunction &Fn) override;\r
-\r
- const char *getPassName() const override {\r
- return "X86 pseudo instruction expansion pass";\r
- }\r
-\r
-private:\r
- bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);\r
- bool ExpandMBB(MachineBasicBlock &MBB);\r
-};\r
-char X86ExpandPseudo::ID = 0;\r
-} // End anonymous namespace.\r
-\r
-/// If \p MBBI is a pseudo instruction, this method expands\r
-/// it to the corresponding (sequence of) actual instruction(s).\r
-/// \returns true if \p MBBI has been expanded.\r
-bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,\r
- MachineBasicBlock::iterator MBBI) {\r
- MachineInstr &MI = *MBBI;\r
- unsigned Opcode = MI.getOpcode();\r
- DebugLoc DL = MBBI->getDebugLoc();\r
- switch (Opcode) {\r
- default:\r
- return false;\r
- case X86::TCRETURNdi:\r
- case X86::TCRETURNri:\r
- case X86::TCRETURNmi:\r
- case X86::TCRETURNdi64:\r
- case X86::TCRETURNri64:\r
- case X86::TCRETURNmi64: {\r
- bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;\r
- MachineOperand &JumpTarget = MBBI->getOperand(0);\r
- MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);\r
- assert(StackAdjust.isImm() && "Expecting immediate value.");\r
-\r
- // Adjust stack pointer.\r
- int StackAdj = StackAdjust.getImm();\r
-\r
- if (StackAdj) {\r
- // Check for possible merge with preceding ADD instruction.\r
- StackAdj += X86FL->mergeSPUpdates(MBB, MBBI, true);\r
- X86FL->emitSPUpdate(MBB, MBBI, StackAdj, /*InEpilogue=*/true);\r
- }\r
-\r
- // Jump to label or value in register.\r
- bool IsWin64 = STI->isTargetWin64();\r
- if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {\r
- unsigned Op = (Opcode == X86::TCRETURNdi)\r
- ? X86::TAILJMPd\r
- : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);\r
- MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));\r
- if (JumpTarget.isGlobal())\r
- MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),\r
- JumpTarget.getTargetFlags());\r
- else {\r
- assert(JumpTarget.isSymbol());\r
- MIB.addExternalSymbol(JumpTarget.getSymbolName(),\r
- JumpTarget.getTargetFlags());\r
- }\r
- } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {\r
- unsigned Op = (Opcode == X86::TCRETURNmi)\r
- ? X86::TAILJMPm\r
- : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);\r
- MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));\r
- for (unsigned i = 0; i != 5; ++i)\r
- MIB.addOperand(MBBI->getOperand(i));\r
- } else if (Opcode == X86::TCRETURNri64) {\r
- BuildMI(MBB, MBBI, DL,\r
- TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))\r
- .addReg(JumpTarget.getReg(), RegState::Kill);\r
- } else {\r
- BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))\r
- .addReg(JumpTarget.getReg(), RegState::Kill);\r
- }\r
-\r
- MachineInstr *NewMI = std::prev(MBBI);\r
- NewMI->copyImplicitOps(*MBBI->getParent()->getParent(), MBBI);\r
-\r
- // Delete the pseudo instruction TCRETURN.\r
- MBB.erase(MBBI);\r
-\r
- return true;\r
- }\r
- case X86::EH_RETURN:\r
- case X86::EH_RETURN64: {\r
- MachineOperand &DestAddr = MBBI->getOperand(0);\r
- assert(DestAddr.isReg() && "Offset should be in register!");\r
- const bool Uses64BitFramePtr =\r
- STI->isTarget64BitLP64() || STI->isTargetNaCl64();\r
- unsigned StackPtr = TRI->getStackRegister();\r
- BuildMI(MBB, MBBI, DL,\r
- TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)\r
- .addReg(DestAddr.getReg());\r
- // The EH_RETURN pseudo is really removed during the MC Lowering.\r
- return true;\r
- }\r
- case X86::IRET: {\r
- // Adjust stack to erase error code\r
- int64_t StackAdj = MBBI->getOperand(0).getImm();\r
- X86FL->emitSPUpdate(MBB, MBBI, StackAdj, true);\r
- // Replace pseudo with machine iret\r
- BuildMI(MBB, MBBI, DL,\r
- TII->get(STI->is64Bit() ? X86::IRET64 : X86::IRET32));\r
- MBB.erase(MBBI);\r
- return true;\r
- }\r
- case X86::EH_RESTORE: {\r
- // Restore ESP and EBP, and optionally ESI if required.\r
- bool IsSEH = isAsynchronousEHPersonality(classifyEHPersonality(\r
- MBB.getParent()->getFunction()->getPersonalityFn()));\r
- X86FL->restoreWin32EHStackPointers(MBB, MBBI, DL, /*RestoreSP=*/IsSEH);\r
- MBBI->eraseFromParent();\r
- return true;\r
- }\r
- }\r
- llvm_unreachable("Previous switch has a fallthrough?");\r
-}\r
-\r
-/// Expand all pseudo instructions contained in \p MBB.\r
-/// \returns true if any expansion occurred for \p MBB.\r
-bool X86ExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {\r
- bool Modified = false;\r
-\r
- // MBBI may be invalidated by the expansion.\r
- MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();\r
- while (MBBI != E) {\r
- MachineBasicBlock::iterator NMBBI = std::next(MBBI);\r
- Modified |= ExpandMI(MBB, MBBI);\r
- MBBI = NMBBI;\r
- }\r
-\r
- return Modified;\r
-}\r
-\r
-bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {\r
- STI = &static_cast<const X86Subtarget &>(MF.getSubtarget());\r
- TII = STI->getInstrInfo();\r
- TRI = STI->getRegisterInfo();\r
- X86FL = STI->getFrameLowering();\r
-\r
- bool Modified = false;\r
- for (MachineBasicBlock &MBB : MF)\r
- Modified |= ExpandMBB(MBB);\r
- return Modified;\r
-}\r
-\r
-/// Returns an instance of the pseudo instruction expansion pass.\r
-FunctionPass *llvm::createX86ExpandPseudoPass() {\r
- return new X86ExpandPseudo();\r
-}\r
+//===------- X86ExpandPseudo.cpp - Expand pseudo instructions -------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains a pass that expands pseudo instructions into target
+// instructions to allow proper scheduling, if-conversion, other late
+// optimizations, or simply the encoding of the instructions.
+//
+//===----------------------------------------------------------------------===//
+
+#include "X86.h"
+#include "X86FrameLowering.h"
+#include "X86InstrBuilder.h"
+#include "X86InstrInfo.h"
+#include "X86MachineFunctionInfo.h"
+#include "X86Subtarget.h"
+#include "llvm/Analysis/EHPersonalities.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/Passes.h" // For IDs of passes that are preserved.
+#include "llvm/IR/GlobalValue.h"
+using namespace llvm;
+
+#define DEBUG_TYPE "x86-pseudo"
+
+namespace {
+class X86ExpandPseudo : public MachineFunctionPass {
+public:
+ static char ID;
+ X86ExpandPseudo() : MachineFunctionPass(ID) {}
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesCFG();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
+ const X86Subtarget *STI;
+ const X86InstrInfo *TII;
+ const X86RegisterInfo *TRI;
+ const X86FrameLowering *X86FL;
+
+ bool runOnMachineFunction(MachineFunction &Fn) override;
+
+ const char *getPassName() const override {
+ return "X86 pseudo instruction expansion pass";
+ }
+
+private:
+ bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
+ bool ExpandMBB(MachineBasicBlock &MBB);
+};
+char X86ExpandPseudo::ID = 0;
+} // End anonymous namespace.
+
+/// If \p MBBI is a pseudo instruction, this method expands
+/// it to the corresponding (sequence of) actual instruction(s).
+/// \returns true if \p MBBI has been expanded.
+bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI) {
+ MachineInstr &MI = *MBBI;
+ unsigned Opcode = MI.getOpcode();
+ DebugLoc DL = MBBI->getDebugLoc();
+ switch (Opcode) {
+ default:
+ return false;
+ case X86::TCRETURNdi:
+ case X86::TCRETURNri:
+ case X86::TCRETURNmi:
+ case X86::TCRETURNdi64:
+ case X86::TCRETURNri64:
+ case X86::TCRETURNmi64: {
+ bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;
+ MachineOperand &JumpTarget = MBBI->getOperand(0);
+ MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
+ assert(StackAdjust.isImm() && "Expecting immediate value.");
+
+ // Adjust stack pointer.
+ int StackAdj = StackAdjust.getImm();
+
+ if (StackAdj) {
+ // Check for possible merge with preceding ADD instruction.
+ StackAdj += X86FL->mergeSPUpdates(MBB, MBBI, true);
+ X86FL->emitSPUpdate(MBB, MBBI, StackAdj, /*InEpilogue=*/true);
+ }
+
+ // Jump to label or value in register.
+ bool IsWin64 = STI->isTargetWin64();
+ if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {
+ unsigned Op = (Opcode == X86::TCRETURNdi)
+ ? X86::TAILJMPd
+ : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);
+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
+ if (JumpTarget.isGlobal())
+ MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
+ JumpTarget.getTargetFlags());
+ else {
+ assert(JumpTarget.isSymbol());
+ MIB.addExternalSymbol(JumpTarget.getSymbolName(),
+ JumpTarget.getTargetFlags());
+ }
+ } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {
+ unsigned Op = (Opcode == X86::TCRETURNmi)
+ ? X86::TAILJMPm
+ : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);
+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
+ for (unsigned i = 0; i != 5; ++i)
+ MIB.addOperand(MBBI->getOperand(i));
+ } else if (Opcode == X86::TCRETURNri64) {
+ BuildMI(MBB, MBBI, DL,
+ TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))
+ .addReg(JumpTarget.getReg(), RegState::Kill);
+ } else {
+ BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))
+ .addReg(JumpTarget.getReg(), RegState::Kill);
+ }
+
+ MachineInstr *NewMI = std::prev(MBBI);
+ NewMI->copyImplicitOps(*MBBI->getParent()->getParent(), MBBI);
+
+ // Delete the pseudo instruction TCRETURN.
+ MBB.erase(MBBI);
+
+ return true;
+ }
+ case X86::EH_RETURN:
+ case X86::EH_RETURN64: {
+ MachineOperand &DestAddr = MBBI->getOperand(0);
+ assert(DestAddr.isReg() && "Offset should be in register!");
+ const bool Uses64BitFramePtr =
+ STI->isTarget64BitLP64() || STI->isTargetNaCl64();
+ unsigned StackPtr = TRI->getStackRegister();
+ BuildMI(MBB, MBBI, DL,
+ TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)
+ .addReg(DestAddr.getReg());
+ // The EH_RETURN pseudo is really removed during the MC Lowering.
+ return true;
+ }
+ case X86::IRET: {
+ // Adjust stack to erase error code
+ int64_t StackAdj = MBBI->getOperand(0).getImm();
+ X86FL->emitSPUpdate(MBB, MBBI, StackAdj, true);
+ // Replace pseudo with machine iret
+ BuildMI(MBB, MBBI, DL,
+ TII->get(STI->is64Bit() ? X86::IRET64 : X86::IRET32));
+ MBB.erase(MBBI);
+ return true;
+ }
+ case X86::EH_RESTORE: {
+ // Restore ESP and EBP, and optionally ESI if required.
+ bool IsSEH = isAsynchronousEHPersonality(classifyEHPersonality(
+ MBB.getParent()->getFunction()->getPersonalityFn()));
+ X86FL->restoreWin32EHStackPointers(MBB, MBBI, DL, /*RestoreSP=*/IsSEH);
+ MBBI->eraseFromParent();
+ return true;
+ }
+ }
+ llvm_unreachable("Previous switch has a fallthrough?");
+}
+
+/// Expand all pseudo instructions contained in \p MBB.
+/// \returns true if any expansion occurred for \p MBB.
+bool X86ExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
+ bool Modified = false;
+
+ // MBBI may be invalidated by the expansion.
+ MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
+ while (MBBI != E) {
+ MachineBasicBlock::iterator NMBBI = std::next(MBBI);
+ Modified |= ExpandMI(MBB, MBBI);
+ MBBI = NMBBI;
+ }
+
+ return Modified;
+}
+
+bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
+ STI = &static_cast<const X86Subtarget &>(MF.getSubtarget());
+ TII = STI->getInstrInfo();
+ TRI = STI->getRegisterInfo();
+ X86FL = STI->getFrameLowering();
+
+ bool Modified = false;
+ for (MachineBasicBlock &MBB : MF)
+ Modified |= ExpandMBB(MBB);
+ return Modified;
+}
+
+/// Returns an instance of the pseudo instruction expansion pass.
+FunctionPass *llvm::createX86ExpandPseudoPass() {
+ return new X86ExpandPseudo();
+}
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