[(store SPR:$src, addrmode5:$addr)]>;
} // isStore
+// avoid copying result of FTOUIZ to int reg when we're just storing it
+let AddedComplexity = 1 in
+def : ARMPat<(store (i32 (bitconvert SPR:$src)), addrmode5:$addr),
+ (FSTS SPR:$src, addrmode5:$addr)>;
+
//===----------------------------------------------------------------------===//
// Load / store multiple Instructions.
//
--- /dev/null
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 > %t
+; RUN: not grep fmrs %t
+
+@i = weak global i32 0 ; <i32*> [#uses=2]
+@u = weak global i32 0 ; <i32*> [#uses=2]
+
+define void @foo5(float %x) {
+entry:
+ %tmp1 = fptosi float %x to i32 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo6(float %x) {
+entry:
+ %tmp1 = fptoui float %x to i32 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @u
+ ret void
+}
+
+define void @foo7(double %x) {
+entry:
+ %tmp1 = fptosi double %x to i32 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @i
+ ret void
+}
+
+define void @foo8(double %x) {
+entry:
+ %tmp1 = fptoui double %x to i32 ; <i32> [#uses=1]
+ store i32 %tmp1, i32* @u
+ ret void
+}