Add comments about LSR / ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt
index f0f4d51b897a960632bffe1f8a32bdfeb6910a64..940db16df66d3a25845f4d1d3b766532c0bebd16 100644 (file)
--- a/lib/Target/ARM/README.txt
+++ b/lib/Target/ARM/README.txt
@@ -463,3 +463,7 @@ More register scavenging work:
    resulting live interval is not assigned a physical register. It may be
    possible (with the help of the scavenger) to turn some spill / restore
    pairs into register copies.
+
+//===---------------------------------------------------------------------===//
+
+Teach LSR about ARM addressing modes.