delete removeFromParent();
}
+ /// isLabel - Returns true if the MachineInstr represents a label.
+ ///
+ bool isLabel() const;
+
/// isDebugLabel - Returns true if the MachineInstr represents a debug label.
///
bool isDebugLabel() const;
SDOperand getRegister(unsigned Reg, MVT VT);
SDOperand getDbgStopPoint(SDOperand Root, unsigned Line, unsigned Col,
const CompileUnitDesc *CU);
+ SDOperand getLabel(unsigned Opcode, SDOperand Root, unsigned LabelID);
SDOperand getCopyToReg(SDOperand Chain, unsigned Reg, SDOperand N) {
return getNode(ISD::CopyToReg, MVT::Other, Chain,
// Operand #last: Optional, an incoming flag.
INLINEASM,
- // LABEL - Represents a label in mid basic block used to track
- // locations needed for debug and exception handling tables. This node
- // returns a chain.
- // Operand #0 : input chain.
- // Operand #1 : module unique number use to identify the label.
- // Operand #2 : 0 indicates a debug label (e.g. stoppoint), 1 indicates
- // a EH label, 2 indicates unknown label type.
- LABEL,
+ // DBG_LABEL, EH_LABEL - Represents a label in mid basic block used to track
+ // locations needed for debug and exception handling tables. These nodes
+ // take a chain as input and return a chain.
+ DBG_LABEL,
+ EH_LABEL,
// DECLARE - Represents a llvm.dbg.declare intrinsic. It's used to track
// local variable declarations for debugging information. First operand is
bool isScalarToVector(const SDNode *N);
/// isDebugLabel - Return true if the specified node represents a debug
- /// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand
- /// is 0).
+ /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
bool isDebugLabel(const SDNode *N);
//===--------------------------------------------------------------------===//
InitOperands(&Chain, 1);
}
public:
-
unsigned getLine() const { return Line; }
unsigned getColumn() const { return Column; }
const CompileUnitDesc *getCompileUnit() const { return CU; }
}
};
+class LabelSDNode : public SDNode {
+ SDUse Chain;
+ unsigned LabelID;
+ virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
+protected:
+ friend class SelectionDAG;
+ LabelSDNode(unsigned NodeTy, SDOperand ch, unsigned id)
+ : SDNode(NodeTy, getSDVTList(MVT::Other)), LabelID(id) {
+ Chain = ch;
+ InitOperands(&Chain, 1);
+ }
+public:
+ unsigned getLabelID() const { return LabelID; }
+
+ static bool classof(const LabelSDNode *) { return true; }
+ static bool classof(const SDNode *N) {
+ return N->getOpcode() == ISD::DBG_LABEL ||
+ N->getOpcode() == ISD::EH_LABEL;
+ }
+};
+
class ExternalSymbolSDNode : public SDNode {
const char *Symbol;
virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
enum {
PHI = 0,
INLINEASM = 1,
- LABEL = 2,
- DECLARE = 3,
- EXTRACT_SUBREG = 4,
- INSERT_SUBREG = 5,
- IMPLICIT_DEF = 6,
- SUBREG_TO_REG = 7
+ DBG_LABEL = 2,
+ EH_LABEL = 3,
+ GC_LABEL = 4,
+ DECLARE = 5,
+ EXTRACT_SUBREG = 6,
+ INSERT_SUBREG = 7,
+ IMPLICIT_DEF = 8,
+ SUBREG_TO_REG = 9
};
unsigned getNumOpcodes() const { return NumOpcodes; }
while (!MBB->succ_empty())
MBB->removeSuccessor(MBB->succ_end()-1);
- // If there is DWARF info to active, check to see if there are any LABEL
+ // If there is DWARF info to active, check to see if there are any DBG_LABEL
// records in the basic block. If so, unregister them from MachineModuleInfo.
if (MMI && !MBB->empty()) {
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
- if ((unsigned)I->getOpcode() == TargetInstrInfo::LABEL) {
+ if ((unsigned)I->getOpcode() == TargetInstrInfo::DBG_LABEL) {
// The label ID # is always operand #0, an immediate.
MMI->InvalidateLabel(I->getOperand(0).getImm());
}
unsigned MachineCodeAnalysis::InsertLabel(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const {
unsigned Label = MMI->NextLabelID();
- BuildMI(MBB, MI, TII->get(TargetInstrInfo::LABEL)).addImm(Label).addImm(2);
+ BuildMI(MBB, MI, TII->get(TargetInstrInfo::GC_LABEL)).addImm(Label);
return Label;
}
I != E; ++I) {
for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
MI != E; ++MI) {
- if (MI->getOpcode() != TargetInstrInfo::LABEL) {
+ if (!MI->isLabel()) {
SawPotentiallyThrowing |= MI->getDesc().isCall();
continue;
}
}
+/// isLabel - Returns true if the MachineInstr represents a label.
+///
+bool MachineInstr::isLabel() const {
+ return getOpcode() == TargetInstrInfo::DBG_LABEL ||
+ getOpcode() == TargetInstrInfo::EH_LABEL ||
+ getOpcode() == TargetInstrInfo::GC_LABEL;
+}
+
/// isDebugLabel - Returns true if the MachineInstr represents a debug label.
///
bool MachineInstr::isDebugLabel() const {
- return getOpcode() == TargetInstrInfo::LABEL && getOperand(1).getImm() == 0;
+ return getOpcode() == TargetInstrInfo::DBG_LABEL;
}
/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
case TargetLowering::Expand: {
MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
bool useDEBUG_LOC = TLI.isOperationLegal(ISD::DEBUG_LOC, MVT::Other);
- bool useLABEL = TLI.isOperationLegal(ISD::LABEL, MVT::Other);
+ bool useLABEL = TLI.isOperationLegal(ISD::DBG_LABEL, MVT::Other);
const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
if (MMI && (useDEBUG_LOC || useLABEL)) {
const CompileUnitDesc *CompileUnit = DSP->getCompileUnit();
unsigned SrcFile = MMI->RecordSource(CompileUnit);
- SmallVector<SDOperand, 8> Ops;
- Ops.push_back(Tmp1); // chain
unsigned Line = DSP->getLine();
unsigned Col = DSP->getColumn();
if (useDEBUG_LOC) {
+ SmallVector<SDOperand, 8> Ops;
+ Ops.push_back(Tmp1); // chain
Ops.push_back(DAG.getConstant(Line, MVT::i32)); // line #
Ops.push_back(DAG.getConstant(Col, MVT::i32)); // col #
Ops.push_back(DAG.getConstant(SrcFile, MVT::i32)); // source file id
Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, &Ops[0], Ops.size());
} else {
unsigned ID = MMI->RecordSourceLine(Line, Col, SrcFile);
- Ops.push_back(DAG.getConstant(ID, MVT::i32));
- Ops.push_back(DAG.getConstant(0, MVT::i32)); // a debug label
- Result = DAG.getNode(ISD::LABEL, MVT::Other, &Ops[0], Ops.size());
+ Result = DAG.getLabel(ISD::DBG_LABEL, Tmp1, ID);
}
} else {
Result = Tmp1; // chain
}
break;
- case ISD::LABEL:
- assert(Node->getNumOperands() == 3 && "Invalid LABEL node!");
- switch (TLI.getOperationAction(ISD::LABEL, MVT::Other)) {
+ case ISD::DBG_LABEL:
+ case ISD::EH_LABEL:
+ assert(Node->getNumOperands() == 1 && "Invalid LABEL node!");
+ switch (TLI.getOperationAction(Node->getOpcode(), MVT::Other)) {
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Legal:
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
- Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the label id.
- Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the "flavor" operand.
- Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
+ Result = DAG.UpdateNodeOperands(Result, Tmp1);
break;
case TargetLowering::Expand:
Result = LegalizeOp(Node->getOperand(0));
assert(0 && "EntryToken should have been excluded from the schedule!");
break;
case ISD::TokenFactor: // fall thru
- case ISD::LABEL:
case ISD::DECLARE:
case ISD::SRCVALUE:
break;
+ case ISD::DBG_LABEL:
+ BB->push_back(BuildMI(TII->get(TargetInstrInfo::DBG_LABEL))
+ .addImm(cast<LabelSDNode>(Node)->getLabelID()));
+ break;
+ case ISD::EH_LABEL:
+ BB->push_back(BuildMI(TII->get(TargetInstrInfo::EH_LABEL))
+ .addImm(cast<LabelSDNode>(Node)->getLabelID()));
+ break;
case ISD::CopyToReg: {
unsigned SrcReg;
SDOperand SrcVal = Node->getOperand(2);
/// isDebugLabel - Return true if the specified node represents a debug
-/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand
-/// is 0).
+/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
bool ISD::isDebugLabel(const SDNode *N) {
SDOperand Zero;
- if (N->getOpcode() == ISD::LABEL)
- Zero = N->getOperand(2);
- else if (N->isTargetOpcode() &&
- N->getTargetOpcode() == TargetInstrInfo::LABEL)
- // Chain moved to last operand.
- Zero = N->getOperand(1);
- else
- return false;
- return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue();
+ if (N->getOpcode() == ISD::DBG_LABEL)
+ return true;
+ if (N->isTargetOpcode() &&
+ N->getTargetOpcode() == TargetInstrInfo::DBG_LABEL)
+ return true;
+ return false;
}
/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
ID.AddPointer(DSP->getCompileUnit());
break;
}
+ case ISD::DBG_LABEL:
+ case ISD::EH_LABEL:
+ ID.AddInteger(cast<LabelSDNode>(N)->getLabelID());
+ break;
case ISD::SRCVALUE:
ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
break;
return SDOperand(N, 0);
}
+SDOperand SelectionDAG::getLabel(unsigned Opcode,
+ SDOperand Root,
+ unsigned LabelID) {
+ FoldingSetNodeID ID;
+ SDOperand Ops[] = { Root };
+ AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
+ ID.AddInteger(LabelID);
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+ SDNode *N = new LabelSDNode(Opcode, Root, LabelID);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
+}
+
SDOperand SelectionDAG::getSrcValue(const Value *V) {
assert((!V || isa<PointerType>(V->getType())) &&
"SrcValue is not a pointer?");
void MemOperandSDNode::ANCHOR() {}
void RegisterSDNode::ANCHOR() {}
void DbgStopPointSDNode::ANCHOR() {}
+void LabelSDNode::ANCHOR() {}
void ExternalSymbolSDNode::ANCHOR() {}
void CondCodeSDNode::ANCHOR() {}
void ARG_FLAGSSDNode::ANCHOR() {}
case ISD::UNDEF: return "undef";
case ISD::MERGE_VALUES: return "merge_values";
case ISD::INLINEASM: return "inlineasm";
- case ISD::LABEL: return "label";
+ case ISD::DBG_LABEL: return "dbg_label";
+ case ISD::EH_LABEL: return "eh_label";
case ISD::DECLARE: return "declare";
case ISD::HANDLENODE: return "handlenode";
case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
DbgRegionStartInst &RSI = cast<DbgRegionStartInst>(I);
if (MMI && RSI.getContext() && MMI->Verify(RSI.getContext())) {
unsigned LabelID = MMI->RecordRegionStart(RSI.getContext());
- DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(),
- DAG.getConstant(LabelID, MVT::i32),
- DAG.getConstant(0, MVT::i32)));
+ DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getRoot(), LabelID));
}
return 0;
DbgRegionEndInst &REI = cast<DbgRegionEndInst>(I);
if (MMI && REI.getContext() && MMI->Verify(REI.getContext())) {
unsigned LabelID = MMI->RecordRegionEnd(REI.getContext());
- DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(),
- DAG.getConstant(LabelID, MVT::i32),
- DAG.getConstant(0, MVT::i32)));
+ DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getRoot(), LabelID));
}
return 0;
// Both PendingLoads and PendingExports must be flushed here;
// this call might not return.
(void)getRoot();
- DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getControlRoot(),
- DAG.getConstant(BeginLabel, MVT::i32),
- DAG.getConstant(1, MVT::i32)));
+ DAG.setRoot(DAG.getLabel(ISD::EH_LABEL, getControlRoot(), BeginLabel));
}
std::pair<SDOperand,SDOperand> Result =
// Insert a label at the end of the invoke call to mark the try range. This
// can be used to detect deletion of the invoke via the MachineModuleInfo.
EndLabel = MMI->NextLabelID();
- DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(),
- DAG.getConstant(EndLabel, MVT::i32),
- DAG.getConstant(1, MVT::i32)));
+ DAG.setRoot(DAG.getLabel(ISD::EH_LABEL, getRoot(), EndLabel));
// Inform MachineModuleInfo of range.
MMI->addInvoke(LandingPad, BeginLabel, EndLabel);
// Add a label to mark the beginning of the landing pad. Deletion of the
// landing pad can thus be detected via the MachineModuleInfo.
unsigned LabelID = MMI->addLandingPad(BB);
- DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, DAG.getEntryNode(),
- DAG.getConstant(LabelID, MVT::i32),
- DAG.getConstant(1, MVT::i32)));
+ DAG.setRoot(DAG.getLabel(ISD::EH_LABEL, DAG.getEntryNode(), LabelID));
// Mark exception register as live in.
unsigned Reg = TLI.getExceptionAddressRegister();
Op += ":" + utostr(D->getLine());
if (D->getColumn() != 0)
Op += ":" + utostr(D->getColumn());
+ } else if (const LabelSDNode *L = dyn_cast<LabelSDNode>(Node)) {
+ Op += ": LabelID=" + utostr(L->getLabelID());
} else if (const ExternalSymbolSDNode *ES =
dyn_cast<ExternalSymbolSDNode>(Node)) {
Op += "'" + std::string(ES->getSymbol()) + "'";
I != E; ++I) {
for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
MI != E; ++MI) {
- if (MI->getOpcode() != TargetInstrInfo::LABEL) {
+ if (!MI->isLabel()) {
MayThrow |= MI->getDesc().isCall();
continue;
}
I != E; ++I) {
for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
MI != E; ++MI) {
- if (MI->getOpcode() != TargetInstrInfo::LABEL) {
+ if (!MI->isLabel()) {
MayThrow |= MI->getDesc().isCall();
continue;
}
// If this machine instr is an inline asm, measure it.
if (MI->getOpcode() == ARM::INLINEASM)
return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
- if (MI->getOpcode() == ARM::LABEL)
+ if (MI->isLabel())
return 0;
if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
return 0;
// We don't have line number support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
// Not implemented yet.
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
if (hasDebugInfo) {
// Mark effective beginning of when frame pointer becomes valid.
FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(SPU::LABEL)).addImm(FrameLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(FrameLabelId);
}
// Adjust stack pointer, spilling $lr -> 16($sp) and $sp -> -FrameSize($sp)
// Mark effective beginning of when frame pointer is ready.
unsigned ReadyLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(SPU::LABEL)).addImm(ReadyLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(ReadyLabelId);
MachineLocation FPDst(SPU::R1);
MachineLocation FPSrc(MachineLocation::VirtualFP);
MachineBasicBlock::iterator MBBI = prior(MBB.end());
// Insert terminator label
unsigned BranchLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(SPU::LABEL)).addImm(BranchLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(BranchLabelId);
}
}
}
// We don't have line number support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
// IA64 has ctlz in the form of the 'fnorm' instruction. The Legalizer
// expansion for ctlz/cttz in terms of ctpop is much larger, but lower
// We don't have line number support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
// Use the default for now
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
// We don't have line number support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
// Use the default for now.
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
default:
MCE.emitWordBE(getBinaryCodeForInstr(*I));
break;
- case TargetInstrInfo::LABEL:
+ case TargetInstrInfo::DBG_LABEL:
+ case TargetInstrInfo::EH_LABEL:
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
const char *AsmStr = MI->getOperand(0).getSymbolName();
return MF->getTarget().getTargetAsmInfo()->getInlineAsmLength(AsmStr);
}
- case PPC::LABEL: {
+ case PPC::DBG_LABEL:
+ case PPC::EH_LABEL:
+ case PPC::GC_LABEL:
return 0;
- }
default:
return 4; // PowerPC instructions are all 4 bytes
}
if (needsFrameMoves) {
// Mark effective beginning of when frame pointer becomes valid.
FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(PPC::LABEL)).addImm(FrameLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(PPC::DBG_LABEL)).addImm(FrameLabelId);
}
// Adjust stack pointer: r1 += NegFrameSize.
// Mark effective beginning of when frame pointer is ready.
unsigned ReadyLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(PPC::LABEL)).addImm(ReadyLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(PPC::DBG_LABEL)).addImm(ReadyLabelId);
MachineLocation FPDst(HasFP ? (IsPPC64 ? PPC::X31 : PPC::R31) :
(IsPPC64 ? PPC::X1 : PPC::R1));
// We don't have line number support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
// RET must be custom lowered, to meet ABI requirements
setOperationAction(ISD::RET , MVT::Other, Custom);
// No debug info support yet.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
setOperationAction(ISD::DECLARE, MVT::Other, Expand);
setStackPointerRegisterToSaveRestore(SP::O6);
let AsmString = "";
let Namespace = "TargetInstrInfo";
}
-def LABEL : Instruction {
+def DBG_LABEL : Instruction {
let OutOperandList = (ops);
- let InOperandList = (ops i32imm:$id, i32imm:$flavor);
+ let InOperandList = (ops i32imm:$id);
+ let AsmString = "";
+ let Namespace = "TargetInstrInfo";
+ let hasCtrlDep = 1;
+}
+def EH_LABEL : Instruction {
+ let OutOperandList = (ops);
+ let InOperandList = (ops i32imm:$id);
+ let AsmString = "";
+ let Namespace = "TargetInstrInfo";
+ let hasCtrlDep = 1;
+}
+def GC_LABEL : Instruction {
+ let OutOperandList = (ops);
+ let InOperandList = (ops i32imm:$id);
let AsmString = "";
let Namespace = "TargetInstrInfo";
let hasCtrlDep = 1;
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
II != IE; ++II) {
// Print the assembly for the instruction.
- if (II->getOpcode() != X86::LABEL)
+ if (!II->isLabel())
hasAnyRealCode = true;
printMachineInstruction(II);
}
case TargetInstrInfo::INLINEASM:
assert(0 && "JIT does not support inline asm!\n");
break;
- case TargetInstrInfo::LABEL:
+ case TargetInstrInfo::DBG_LABEL:
+ case TargetInstrInfo::EH_LABEL:
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
// FIXME - use subtarget debug flags
if (!Subtarget->isTargetDarwin() &&
!Subtarget->isTargetELF() &&
- !Subtarget->isTargetCygMing())
- setOperationAction(ISD::LABEL, MVT::Other, Expand);
+ !Subtarget->isTargetCygMing()) {
+ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
+ setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
+ }
setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand);
setOperationAction(ISD::EHSELECTION, MVT::i64, Expand);
FinalSize += AI->getInlineAsmLength(AsmStr);
break;
}
- case TargetInstrInfo::LABEL:
+ case TargetInstrInfo::DBG_LABEL:
+ case TargetInstrInfo::EH_LABEL:
break;
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::DECLARE:
if (needsFrameMoves) {
// Mark effective beginning of when frame pointer becomes valid.
FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(X86::LABEL)).addImm(FrameLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(X86::DBG_LABEL)).addImm(FrameLabelId);
}
// Update EBP with the new base value...
if (needsFrameMoves) {
// Mark effective beginning of when frame pointer is ready.
ReadyLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(X86::LABEL)).addImm(ReadyLabelId).addImm(0);
+ BuildMI(MBB, MBBI, TII.get(X86::DBG_LABEL)).addImm(ReadyLabelId);
}
// Skip the callee-saved push instructions.
for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
const AsmWriterInst *Inst = getAsmWriterInstByID(i);
- if (Inst == 0) continue; // PHI, INLINEASM, LABEL, etc.
+ if (Inst == 0) continue; // PHI, INLINEASM, DBG_LABEL, etc.
std::string Command;
if (Inst->Operands.empty())
<< " O << \"\\t\";\n"
<< " printInlineAsm(MI);\n"
<< " return true;\n"
- << " } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n"
+ << " } else if (MI->isLabel()) {\n"
<< " printLabel(MI);\n"
<< " return true;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
Record *R = *I;
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
- R->getName() == "LABEL" ||
+ R->getName() == "DBG_LABEL" ||
+ R->getName() == "EH_LABEL" ||
+ R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
- R->getName() == "LABEL" ||
+ R->getName() == "DBG_LABEL" ||
+ R->getName() == "EH_LABEL" ||
+ R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
if (InstName == "PHI" ||
InstName == "INLINEASM" ||
- InstName == "LABEL"||
+ InstName == "DBG_LABEL"||
+ InstName == "EH_LABEL"||
+ InstName == "GC_LABEL"||
InstName == "DECLARE"||
InstName == "EXTRACT_SUBREG" ||
InstName == "INSERT_SUBREG" ||
if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
const CodeGenInstruction *INLINEASM = &I->second;
- I = getInstructions().find("LABEL");
- if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
- const CodeGenInstruction *LABEL = &I->second;
+ I = getInstructions().find("DBG_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
+ const CodeGenInstruction *DBG_LABEL = &I->second;
+
+ I = getInstructions().find("EH_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
+ const CodeGenInstruction *EH_LABEL = &I->second;
+
+ I = getInstructions().find("GC_LABEL");
+ if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
+ const CodeGenInstruction *GC_LABEL = &I->second;
I = getInstructions().find("DECLARE");
if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
- NumberedInstructions.push_back(LABEL);
+ NumberedInstructions.push_back(DBG_LABEL);
+ NumberedInstructions.push_back(EH_LABEL);
+ NumberedInstructions.push_back(GC_LABEL);
NumberedInstructions.push_back(DECLARE);
NumberedInstructions.push_back(EXTRACT_SUBREG);
NumberedInstructions.push_back(INSERT_SUBREG);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
- &II->second != LABEL &&
+ &II->second != DBG_LABEL &&
+ &II->second != EH_LABEL &&
+ &II->second != GC_LABEL &&
&II->second != DECLARE &&
&II->second != EXTRACT_SUBREG &&
&II->second != INSERT_SUBREG &&
<< " N.getValueType());\n"
<< "}\n\n";
- OS << "SDNode *Select_LABEL(const SDOperand &N) {\n"
- << " SDOperand Chain = N.getOperand(0);\n"
- << " SDOperand N1 = N.getOperand(1);\n"
- << " SDOperand N2 = N.getOperand(2);\n"
- << " unsigned C1 = cast<ConstantSDNode>(N1)->getValue();\n"
- << " unsigned C2 = cast<ConstantSDNode>(N2)->getValue();\n"
- << " SDOperand Tmp1 = CurDAG->getTargetConstant(C1, MVT::i32);\n"
- << " SDOperand Tmp2 = CurDAG->getTargetConstant(C2, MVT::i32);\n"
- << " AddToISelQueue(Chain);\n"
- << " SDOperand Ops[] = { Tmp1, Tmp2, Chain };\n"
- << " return CurDAG->getTargetNode(TargetInstrInfo::LABEL,\n"
- << " MVT::Other, Ops, 3);\n"
- << "}\n\n";
-
OS << "SDNode *Select_DECLARE(const SDOperand &N) {\n"
<< " SDOperand Chain = N.getOperand(0);\n"
<< " SDOperand N1 = N.getOperand(1);\n"
<< " case ISD::TokenFactor:\n"
<< " case ISD::CopyFromReg:\n"
<< " case ISD::CopyToReg: {\n"
+ << " case ISD::DBG_LABEL:\n"
+ << " case ISD::EH_LABEL:\n"
<< " for (unsigned i = 0, e = N.getNumOperands(); i != e; ++i)\n"
<< " AddToISelQueue(N.getOperand(i));\n"
<< " return NULL;\n"
<< " }\n"
<< " case ISD::INLINEASM: return Select_INLINEASM(N);\n"
- << " case ISD::LABEL: return Select_LABEL(N);\n"
<< " case ISD::DECLARE: return Select_DECLARE(N);\n"
<< " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n"
<< " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n"
// This isn't an error if this is a builtin instruction.
if (R->getName() != "PHI" &&
R->getName() != "INLINEASM" &&
- R->getName() != "LABEL" &&
+ R->getName() != "DBG_LABEL" &&
+ R->getName() != "EH_LABEL" &&
+ R->getName() != "GC_LABEL" &&
R->getName() != "DECLARE" &&
R->getName() != "EXTRACT_SUBREG" &&
R->getName() != "INSERT_SUBREG" &&
projects / oota-llvm.git / commitdiff