don't emit 'add %o6, 0, %o6' instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24857 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index f781ee92a5ce87728f94065091f263cf7756ef2e..7b258567304afe95c3e29a3ddf3baff5244f13f4 100644 (file)
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -77,11 +77,12 @@ void SparcV8RegisterInfo::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
   MachineInstr &MI = *I;
-  int size = MI.getOperand (0).getImmedValue ();
-  if (MI.getOpcode () == V8::ADJCALLSTACKDOWN)
-    size = -size;
-  BuildMI (MBB, I, V8::ADDri, 2, V8::O6).addReg (V8::O6).addSImm (size);
-  MBB.erase (I);
+  int Size = MI.getOperand(0).getImmedValue();
+  if (MI.getOpcode() == V8::ADJCALLSTACKDOWN)
+    Size = -Size;
+  if (Size)
+    BuildMI(MBB, I, V8::ADDri, 2, V8::O6).addReg(V8::O6).addSImm(Size);
+  MBB.erase(I);
 }
 
 void

diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
index f781ee92a5ce87728f94065091f263cf7756ef2e..7b258567304afe95c3e29a3ddf3baff5244f13f4 100644 (file)
--- a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
+++ b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
@@ -77,11 +77,12 @@ void SparcV8RegisterInfo::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
   MachineInstr &MI = *I;
-  int size = MI.getOperand (0).getImmedValue ();
-  if (MI.getOpcode () == V8::ADJCALLSTACKDOWN)
-    size = -size;
-  BuildMI (MBB, I, V8::ADDri, 2, V8::O6).addReg (V8::O6).addSImm (size);
-  MBB.erase (I);
+  int Size = MI.getOperand(0).getImmedValue();
+  if (MI.getOpcode() == V8::ADJCALLSTACKDOWN)
+    Size = -Size;
+  if (Size)
+    BuildMI(MBB, I, V8::ADDri, 2, V8::O6).addReg(V8::O6).addSImm(Size);
+  MBB.erase(I);
 }
 
 void