[mips][msa] Removed unsupported dot product instructions (dotp_[su].b)

The dotp_[su].b instructions never existed in any revision of the MSA spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190398 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/IR/IntrinsicsMips.td b/include/llvm/IR/IntrinsicsMips.td
index af01bf9c6813908e561694d2944c831a9ac674d3..b4872d23d75e76ff3413ba4a9f812b373c35e6c9 100644 (file)
--- a/include/llvm/IR/IntrinsicsMips.td
+++ b/include/llvm/IR/IntrinsicsMips.td
@@ -813,8 +813,6 @@ def int_mips_div_u_w : GCCBuiltin<"__builtin_msa_div_u_w">,
 def int_mips_div_u_d : GCCBuiltin<"__builtin_msa_div_u_d">,
   Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], [IntrNoMem]>;
 
-def int_mips_dotp_s_b : GCCBuiltin<"__builtin_msa_dotp_s_b">,
-  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 def int_mips_dotp_s_h : GCCBuiltin<"__builtin_msa_dotp_s_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 def int_mips_dotp_s_w : GCCBuiltin<"__builtin_msa_dotp_s_w">,
@@ -822,8 +820,6 @@ def int_mips_dotp_s_w : GCCBuiltin<"__builtin_msa_dotp_s_w">,
 def int_mips_dotp_s_d : GCCBuiltin<"__builtin_msa_dotp_s_d">,
   Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], [IntrNoMem]>;
 
-def int_mips_dotp_u_b : GCCBuiltin<"__builtin_msa_dotp_u_b">,
-  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 def int_mips_dotp_u_h : GCCBuiltin<"__builtin_msa_dotp_u_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 def int_mips_dotp_u_w : GCCBuiltin<"__builtin_msa_dotp_u_w">,

diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td
index abac27284a417a3b7be713bb1a8235c839c87b00..a7d47908bf25bf3aaa9f4443ee99c490676ebbe8 100644 (file)
--- a/lib/Target/Mips/MipsMSAInstrInfo.td
+++ b/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -250,12 +250,10 @@ class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
 
-class DOTP_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010011>;
 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
 
-class DOTP_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010011>;
 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
@@ -1240,8 +1238,6 @@ class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", int_mips_div_u_h, MSA128H>;
 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", int_mips_div_u_w, MSA128W>;
 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", int_mips_div_u_d, MSA128D>;
 
-class DOTP_S_B_DESC : MSA_3R_DESC_BASE<"dotp_s.b", int_mips_dotp_s_b, MSA128B>,
-                                       IsCommutable;
 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H>,
                       IsCommutable;
 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W>,
@@ -1249,8 +1245,6 @@ class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W>,
 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D>,
                       IsCommutable;
 
-class DOTP_U_B_DESC : MSA_3R_DESC_BASE<"dotp_u.b", int_mips_dotp_u_b, MSA128B>,
-                                       IsCommutable;
 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H>,
                       IsCommutable;
 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W>,
@@ -2133,12 +2127,10 @@ def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
 
-def DOTP_S_B : DOTP_S_B_ENC, DOTP_S_B_DESC;
 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
 
-def DOTP_U_B : DOTP_U_B_ENC, DOTP_U_B_DESC;
 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;

diff --git a/test/CodeGen/Mips/msa/3r-d.ll b/test/CodeGen/Mips/msa/3r-d.ll
index ee94e5650d8b56346bc30c528b7be5d3d749a845..5edf8ca983e3059d9e1b8b4a0f1537414f5b1f7b 100644 (file)
--- a/test/CodeGen/Mips/msa/3r-d.ll
+++ b/test/CodeGen/Mips/msa/3r-d.ll
@@ -179,28 +179,6 @@ declare <2 x i64> @llvm.mips.div.u.d(<2 x i64>, <2 x i64>) nounwind
 ; CHECK: st.d
 ; CHECK: .size llvm_mips_div_u_d_test
 ;
-@llvm_mips_dotp_s_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
-@llvm_mips_dotp_s_b_ARG2 = global <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, align 16
-@llvm_mips_dotp_s_b_RES  = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16
-
-define void @llvm_mips_dotp_s_b_test() nounwind {
-entry:
-  %0 = load <16 x i8>* @llvm_mips_dotp_s_b_ARG1
-  %1 = load <16 x i8>* @llvm_mips_dotp_s_b_ARG2
-  %2 = tail call <16 x i8> @llvm.mips.dotp.s.b(<16 x i8> %0, <16 x i8> %1)
-  store <16 x i8> %2, <16 x i8>* @llvm_mips_dotp_s_b_RES
-  ret void
-}
-
-declare <16 x i8> @llvm.mips.dotp.s.b(<16 x i8>, <16 x i8>) nounwind
-
-; CHECK: llvm_mips_dotp_s_b_test:
-; CHECK: ld.b
-; CHECK: ld.b
-; CHECK: dotp_s.b
-; CHECK: st.b
-; CHECK: .size llvm_mips_dotp_s_b_test
-;
 @llvm_mips_dotp_s_h_ARG1 = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, align 16
 @llvm_mips_dotp_s_h_ARG2 = global <8 x i16> <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, align 16
 @llvm_mips_dotp_s_h_RES  = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, align 16
@@ -267,28 +245,6 @@ declare <2 x i64> @llvm.mips.dotp.s.d(<2 x i64>, <2 x i64>) nounwind
 ; CHECK: st.d
 ; CHECK: .size llvm_mips_dotp_s_d_test
 ;
-@llvm_mips_dotp_u_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
-@llvm_mips_dotp_u_b_ARG2 = global <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, align 16
-@llvm_mips_dotp_u_b_RES  = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16
-
-define void @llvm_mips_dotp_u_b_test() nounwind {
-entry:
-  %0 = load <16 x i8>* @llvm_mips_dotp_u_b_ARG1
-  %1 = load <16 x i8>* @llvm_mips_dotp_u_b_ARG2
-  %2 = tail call <16 x i8> @llvm.mips.dotp.u.b(<16 x i8> %0, <16 x i8> %1)
-  store <16 x i8> %2, <16 x i8>* @llvm_mips_dotp_u_b_RES
-  ret void
-}
-
-declare <16 x i8> @llvm.mips.dotp.u.b(<16 x i8>, <16 x i8>) nounwind
-
-; CHECK: llvm_mips_dotp_u_b_test:
-; CHECK: ld.b
-; CHECK: ld.b
-; CHECK: dotp_u.b
-; CHECK: st.b
-; CHECK: .size llvm_mips_dotp_u_b_test
-;
 @llvm_mips_dotp_u_h_ARG1 = global <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, align 16
 @llvm_mips_dotp_u_h_ARG2 = global <8 x i16> <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, align 16
 @llvm_mips_dotp_u_h_RES  = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, align 16