The select instruction is not neccesarily in the same block as the

phi nodes.  Make sure to phi translate from the right block.

This fixes a llvm-building-llvm failure on GVN-PRE.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82970 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 6826e1327350af033a9e185e1d048d2d9ce9d2b1..561527cbb461d78360e6fe9267798429ee1a899c 100644 (file)
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -2002,10 +2002,11 @@ Instruction *InstCombiner::FoldOpIntoPhi(Instruction &I,
     // not the true/false values.
     Value *TrueV = SI->getTrueValue();
     Value *FalseV = SI->getFalseValue();
+    BasicBlock *PhiTransBB = PN->getParent();
     for (unsigned i = 0; i != NumPHIValues; ++i) {
       BasicBlock *ThisBB = PN->getIncomingBlock(i);
-      Value *TrueVInPred = TrueV->DoPHITranslation(I.getParent(), ThisBB);
-      Value *FalseVInPred = FalseV->DoPHITranslation(I.getParent(), ThisBB);
+      Value *TrueVInPred = TrueV->DoPHITranslation(PhiTransBB, ThisBB);
+      Value *FalseVInPred = FalseV->DoPHITranslation(PhiTransBB, ThisBB);
       Value *InV = 0;
       if (Constant *InC = dyn_cast<Constant>(PN->getIncomingValue(i))) {
         InV = InC->isNullValue() ? FalseVInPred : TrueVInPred;

diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll
index 701d5967a67c7356908ee02ecff0ba6d23f834c8..b04382e8b113279417a9ea352f0980a34b97db55 100644 (file)
--- a/test/Transforms/InstCombine/select.ll
+++ b/test/Transforms/InstCombine/select.ll
@@ -247,3 +247,19 @@ ret:
   %b = select i1 %a, i32 %A, i32 %c
   ret i32 %b
 }
+
+define i32 @test29(i1 %cond, i32 %A, i32 %B)  {
+entry:
+  br i1 %cond, label %jump, label %ret
+jump:
+  br label %ret 
+ret:
+  %c = phi i32 [%A, %jump], [%B, %entry]
+  %a = phi i1 [true, %jump], [false, %entry]
+  br label %next
+  
+next:
+  %b = select i1 %a, i32 %A, i32 %c
+  ret i32 %b
+}
+