[X86] Fix missing/wrong scheduling model found by code inspection.
authorQuentin Colombet <qcolombet@apple.com>
Wed, 23 Apr 2014 19:30:26 +0000 (19:30 +0000)
committerQuentin Colombet <qcolombet@apple.com>
Wed, 23 Apr 2014 19:30:26 +0000 (19:30 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207014 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrMMX.td
lib/Target/X86/X86InstrSSE.td

index 16e5a80813258cbb771b7400ccce68d8b135c08d..ecf80a1ac9bf8b35b7e9295cf0c1ffdc38eeb48e 100644 (file)
@@ -267,11 +267,12 @@ def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src),
                         "movq\t{$src, $dst|$dst, $src}",
                         [(set VR64:$dst, (load_mmx addr:$src))],
                         IIC_MMX_MOVQ_RM>;
+} // SchedRW
+let SchedRW = [WriteStore] in
 def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src),
                         "movq\t{$src, $dst|$dst, $src}",
                         [(store (x86mmx VR64:$src), addr:$dst)],
                         IIC_MMX_MOVQ_RM>;
-} // SchedRW
 
 let SchedRW = [WriteMove] in {
 def MMX_MOVDQ2Qrr : MMXSDIi8<0xD6, MRMSrcReg, (outs VR64:$dst),
index 8229b2f7c64150e86a216031448fef6b6716ecf7..3b0cc6bff2f57bd9a0b1f3e02c5280ab0489221f 100644 (file)
@@ -7407,6 +7407,7 @@ let Predicates = [UseSSE41] in {
 
 }
 
+let SchedRW = [WriteLoad] in {
 let Predicates = [HasAVX] in
 def VMOVNTDQArm : SS48I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
                        "vmovntdqa\t{$src, $dst|$dst, $src}",
@@ -7420,6 +7421,7 @@ def VMOVNTDQAYrm : SS48I<0x2A, MRMSrcMem, (outs VR256:$dst), (ins i256mem:$src),
 def MOVNTDQArm : SS48I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
                        "movntdqa\t{$src, $dst|$dst, $src}",
                        [(set VR128:$dst, (int_x86_sse41_movntdqa addr:$src))]>;
+} // SchedRW
 
 //===----------------------------------------------------------------------===//
 // SSE4.2 - Compare Instructions