Add file missing from previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106058 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index bb3a6f472d96c1b7b023436e8dbc428ef5008585..052104d0533e26bdaff713d1121684a785f6f20e 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1044,7 +1044,7 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
                      Pseudo, IIC_Br,
                      "@TC_RETURN","\t$dst", []>, Requires<[IsDarwin]>;
 
-  def TCRETURNri : AInoP<(outs), (ins tGPR:$dst, variable_ops),
+  def TCRETURNri : AInoP<(outs), (ins tcGPR:$dst, variable_ops),
                      Pseudo, IIC_Br,
                      "@TC_RETURN","\t$dst", []>, Requires<[IsDarwin]>;
 
@@ -1052,7 +1052,7 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
                  IIC_Br, "b\t$dst  @ TAILCALL",
                  []>, Requires<[IsDarwin]>;
 
-  def TAILJMPr : AXI<(outs), (ins tGPR:$dst, variable_ops),
+  def TAILJMPr : AXI<(outs), (ins tcGPR:$dst, variable_ops),
                    BrMiscFrm, IIC_Br, "bx\t$dst  @ TAILCALL",
                  []>, Requires<[IsDarwin]> {
                  let Inst{7-4}   = 0b0001;
@@ -1476,6 +1476,14 @@ def MOVr : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPFrm, IIC_iMOVr,
   let Inst{25} = 0;
 }
 
+// A version for the smaller set of tail call registers.
+let neverHasSideEffects = 1 in
+def MOVr_TC : AsI1<0b1101, (outs tcGPR:$dst), (ins tcGPR:$src), DPFrm, 
+                IIC_iMOVr, "mov", "\t$dst, $src", []>, UnaryDP {
+  let Inst{11-4} = 0b00000000;
+  let Inst{25} = 0;
+}
+
 def MOVs : AsI1<0b1101, (outs GPR:$dst), (ins so_reg:$src),
                 DPSoRegFrm, IIC_iMOVsr,
                 "mov", "\t$dst, $src", [(set GPR:$dst, so_reg:$src)]>, UnaryDP {
@@ -2700,8 +2708,8 @@ def : ARMPat<(ARMWrapperJT tjumptable:$dst, imm:$id),
 // TODO: add,sub,and, 3-instr forms?
 
 // Tail calls
-def : ARMPat<(ARMtcret tGPR:$dst),
-          (TCRETURNri tGPR:$dst)>, Requires<[IsDarwin]>;
+def : ARMPat<(ARMtcret tcGPR:$dst),
+          (TCRETURNri tcGPR:$dst)>, Requires<[IsDarwin]>;
 
 def : ARMPat<(ARMtcret (i32 tglobaladdr:$dst)),
           (TCRETURNdi texternalsym:$dst)>, Requires<[IsDarwin]>;
@@ -2709,8 +2717,8 @@ def : ARMPat<(ARMtcret (i32 tglobaladdr:$dst)),
 def : ARMPat<(ARMtcret (i32 texternalsym:$dst)),
           (TCRETURNdi texternalsym:$dst)>, Requires<[IsDarwin]>;
 
-def : ARMPat<(ARMtcret tGPR:$dst),
-          (TCRETURNriND tGPR:$dst)>, Requires<[IsNotDarwin]>;
+def : ARMPat<(ARMtcret tcGPR:$dst),
+          (TCRETURNriND tcGPR:$dst)>, Requires<[IsNotDarwin]>;
 
 def : ARMPat<(ARMtcret (i32 tglobaladdr:$dst)),
           (TCRETURNdiND texternalsym:$dst)>, Requires<[IsNotDarwin]>;