Convert more Neon tests to FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78261 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll
index fc925f60683ee1e4f2dd4e286ab08ff14c66df48..2a5ee04ebaf60cb02378c39b8b5ed3970717603e 100644 (file)
--- a/test/CodeGen/ARM/vld1.ll
+++ b/test/CodeGen/ARM/vld1.ll
@@ -1,55 +1,71 @@
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
-; RUN: grep {vld1\\.8} %t | count 2
-; RUN: grep {vld1\\.16} %t | count 2
-; RUN: grep {vld1\\.32} %t | count 4
-; RUN: grep {vld1\\.64} %t | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
 
 define <8 x i8> @vld1i8(i8* %A) nounwind {
+;CHECK: vld1i8:
+;CHECK: vld1.8
        %tmp1 = call <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8* %A)
        ret <8 x i8> %tmp1
 }
 
 define <4 x i16> @vld1i16(i16* %A) nounwind {
+;CHECK: vld1i16:
+;CHECK: vld1.16
        %tmp1 = call <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16* %A)
        ret <4 x i16> %tmp1
 }
 
 define <2 x i32> @vld1i32(i32* %A) nounwind {
+;CHECK: vld1i32:
+;CHECK: vld1.32
        %tmp1 = call <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32* %A)
        ret <2 x i32> %tmp1
 }
 
 define <2 x float> @vld1f(float* %A) nounwind {
+;CHECK: vld1f:
+;CHECK: vld1.32
        %tmp1 = call <2 x float> @llvm.arm.neon.vld1f.v2f32(float* %A)
        ret <2 x float> %tmp1
 }
 
 define <1 x i64> @vld1i64(i64* %A) nounwind {
+;CHECK: vld1i64:
+;CHECK: vld1.64
        %tmp1 = call <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64* %A)
        ret <1 x i64> %tmp1
 }
 
 define <16 x i8> @vld1Qi8(i8* %A) nounwind {
+;CHECK: vld1Qi8:
+;CHECK: vld1.8
        %tmp1 = call <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8* %A)
        ret <16 x i8> %tmp1
 }
 
 define <8 x i16> @vld1Qi16(i16* %A) nounwind {
+;CHECK: vld1Qi16:
+;CHECK: vld1.16
        %tmp1 = call <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16* %A)
        ret <8 x i16> %tmp1
 }
 
 define <4 x i32> @vld1Qi32(i32* %A) nounwind {
+;CHECK: vld1Qi32:
+;CHECK: vld1.32
        %tmp1 = call <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32* %A)
        ret <4 x i32> %tmp1
 }
 
 define <4 x float> @vld1Qf(float* %A) nounwind {
+;CHECK: vld1Qf:
+;CHECK: vld1.32
        %tmp1 = call <4 x float> @llvm.arm.neon.vld1f.v4f32(float* %A)
        ret <4 x float> %tmp1
 }
 
 define <2 x i64> @vld1Qi64(i64* %A) nounwind {
+;CHECK: vld1Qi64:
+;CHECK: vld1.64
        %tmp1 = call <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64* %A)
        ret <2 x i64> %tmp1
 }

diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll
index c4099a50efc51e723eb208a02a709bcbef6bef00..6a82b444153a79013704baa6f0de686ccfea7419 100644 (file)
--- a/test/CodeGen/ARM/vst1.ll
+++ b/test/CodeGen/ARM/vst1.ll
@@ -1,64 +1,80 @@
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
-; RUN: grep {vst1\\.8} %t | count 2
-; RUN: grep {vst1\\.16} %t | count 2
-; RUN: grep {vst1\\.32} %t | count 4
-; RUN: grep {vst1\\.64} %t | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
 
 define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
+;CHECK: vst1i8:
+;CHECK: vst1.8
        %tmp1 = load <8 x i8>* %B
        call void @llvm.arm.neon.vst1i.v8i8(i8* %A, <8 x i8> %tmp1)
        ret void
 }
 
 define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind {
+;CHECK: vst1i16:
+;CHECK: vst1.16
        %tmp1 = load <4 x i16>* %B
        call void @llvm.arm.neon.vst1i.v4i16(i16* %A, <4 x i16> %tmp1)
        ret void
 }
 
 define void @vst1i32(i32* %A, <2 x i32>* %B) nounwind {
+;CHECK: vst1i32:
+;CHECK: vst1.32
        %tmp1 = load <2 x i32>* %B
        call void @llvm.arm.neon.vst1i.v2i32(i32* %A, <2 x i32> %tmp1)
        ret void
 }
 
 define void @vst1f(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst1f:
+;CHECK: vst1.32
        %tmp1 = load <2 x float>* %B
        call void @llvm.arm.neon.vst1f.v2f32(float* %A, <2 x float> %tmp1)
        ret void
 }
 
 define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
+;CHECK: vst1i64:
+;CHECK: vst1.64
        %tmp1 = load <1 x i64>* %B
        call void @llvm.arm.neon.vst1i.v1i64(i64* %A, <1 x i64> %tmp1)
        ret void
 }
 
 define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
+;CHECK: vst1Qi8:
+;CHECK: vst1.8
        %tmp1 = load <16 x i8>* %B
        call void @llvm.arm.neon.vst1i.v16i8(i8* %A, <16 x i8> %tmp1)
        ret void
 }
 
 define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
+;CHECK: vst1Qi16:
+;CHECK: vst1.16
        %tmp1 = load <8 x i16>* %B
        call void @llvm.arm.neon.vst1i.v8i16(i16* %A, <8 x i16> %tmp1)
        ret void
 }
 
 define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind {
+;CHECK: vst1Qi32:
+;CHECK: vst1.32
        %tmp1 = load <4 x i32>* %B
        call void @llvm.arm.neon.vst1i.v4i32(i32* %A, <4 x i32> %tmp1)
        ret void
 }
 
 define void @vst1Qf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst1Qf:
+;CHECK: vst1.32
        %tmp1 = load <4 x float>* %B
        call void @llvm.arm.neon.vst1f.v4f32(float* %A, <4 x float> %tmp1)
        ret void
 }
 
 define void @vst1Qi64(i64* %A, <2 x i64>* %B) nounwind {
+;CHECK: vst1Qi64:
+;CHECK: vst1.64
        %tmp1 = load <2 x i64>* %B
        call void @llvm.arm.neon.vst1i.v2i64(i64* %A, <2 x i64> %tmp1)
        ret void