-; RUN: llvm-as < %s | llc -march=x86 -regalloc=simple
+; RUN: llc < %s -march=x86 -regalloc=simple
define i32 @main() {
; %A = 0
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=simple
+; RUN: llc < %s -march=x86 -regalloc=simple
define i32 @main(i32 %B) {
;%B = add i32 0, 1;
; it makes a ton of annoying overlapping live ranges. This code should not
; cause spills!
;
-; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep spilled
+; RUN: llc < %s -march=x86 -stats |& not grep spilled
target datalayout = "e-p:32:32"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @test() {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | \
+; RUN: llc < %s -march=x86 | \
; RUN: not grep {.byte\[\[:space:\]\]*true}
@X = global i1 true ; <i1*> [#uses=0]
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1
@A = global [32 x i32] zeroinitializer
@B = global [32 x i32] zeroinitializer
-; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp}
-; RUN: llvm-as < %s | llc -march=x86 | grep {pushl %ebp} | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep {popl %ebp} | count 1
+; RUN: llc < %s -march=x86 | grep {(%esp}
+; RUN: llc < %s -march=x86 | grep {pushl %ebp} | count 1
+; RUN: llc < %s -march=x86 | grep {popl %ebp} | count 1
declare i8* @llvm.returnaddress(i32)
-; RUN: llvm-as < %s | llc -march=x86 | grep -i ESP | not grep sub
+; RUN: llc < %s -march=x86 | grep -i ESP | not grep sub
define i32 @test(i32 %X) {
ret i32 %X
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i1 @test1(double %X) {
%V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
ret i1 %V
-; RUN: llvm-as < %s | llc -march=x86 | not grep {j\[lgbe\]}
+; RUN: llc < %s -march=x86 | not grep {j\[lgbe\]}
define i32 @max(i32 %A, i32 %B) {
%gt = icmp sgt i32 %A, %B ; <i1> [#uses=1]
; overlapping live intervals. When two overlapping intervals have the same
; value, they can be joined though.
;
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=linearscan | \
+; RUN: llc < %s -march=x86 -regalloc=linearscan | \
; RUN: not grep {mov %\[A-Z\]\\\{2,3\\\}, %\[A-Z\]\\\{2,3\\\}}
define i64 @test(i64 %x) {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define double @test(double %d) {
%X = select i1 false, double %d, double %d ; <double> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i1 @T(double %X) {
%V = fcmp oeq double %X, %X ; <i1> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) {
%E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
; is invalid code (there is no correct way to order the instruction). Check
; that we do not fold the load into the sub.
-; RUN: llvm-as < %s | llc -march=x86 | not grep sub.*GLOBAL
+; RUN: llc < %s -march=x86 | not grep sub.*GLOBAL
@GLOBAL = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep 18446744073709551612
+; RUN: llc < %s -march=x86 | not grep 18446744073709551612
@A = external global i32 ; <i32*> [#uses=1]
@Y = global i32* getelementptr (i32* @A, i32 -1) ; <i32**> [#uses=0]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=generic
+; RUN: llc < %s -march=x86 -mcpu=generic
; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
define void @radfg_() {
-; RUN: llvm-as < %s | llc -march=x86 | \
+; RUN: llc < %s -march=x86 | \
; RUN: grep shld | count 1
;
; Check that the isel does not fold the shld, which already folds a load
-; RUN: llvm-as < %s | llc -march=x86 | not grep {subl.*%esp}
+; RUN: llc < %s -march=x86 | not grep {subl.*%esp}
define i32 @f(i32 %a, i32 %b) {
%tmp.2 = mul i32 %a, %a ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -stats |& \
+; RUN: llc < %s -march=x86 -stats |& \
; RUN: grep asm-printer | grep 7
define i32 @g(i32 %a, i32 %b) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah
; END.
target datalayout = "e-p:32:32"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stats |& \
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
; RUN: not grep {Number of register spills}
; END.
-; RUN: llvm-as < %s | llc -march=x86 -stats |& \
+; RUN: llc < %s -march=x86 -stats |& \
; RUN: grep asm-printer | grep 13
define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
; fixed, the movb should go away as well.
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \
+; RUN: llc < %s -march=x86 -relocation-model=static | \
; RUN: grep movl
@B = external global i32 ; <i32*> [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\
; RUN: grep {asm-printer} | grep 31
target datalayout = "e-p:32:32"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define <4 x float> @opRSQ(<4 x float> %a) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep setnp
-; RUN: llvm-as < %s | llc -march=x86 -enable-unsafe-fp-math | \
+; RUN: llc < %s -march=x86 | grep setnp
+; RUN: llc < %s -march=x86 -enable-unsafe-fp-math | \
; RUN: not grep setnp
define i32 @test(float %f) {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @test() {
br i1 false, label %cond_next33, label %cond_true12
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR825
define i64 @test() {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR828
target datalayout = "e-p:32:32"
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att
; PR834
; END.
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR833
@G = weak global i32 0 ; <i32*> [#uses=3]
-; RUN: llvm-as < %s | llc -march=x86 | grep -- 4294967240
+; RUN: llc < %s -march=x86 | grep -- 4294967240
; PR853
@X = global i32* inttoptr (i64 -56 to i32*) ; <i32**> [#uses=0]
; PR850
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att > %t
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att > %t
; RUN: grep {movl 4(%eax),%ebp} %t
; RUN: grep {movl 0(%eax), %ebx} %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
%struct.foo = type opaque
define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* }
%struct.hash_table = type { %struct.expr**, i32, i32, i32 }
%struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 }
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | \
+; RUN: llc < %s -march=x86 -mcpu=i386 | \
; RUN: not grep {movl %eax, %edx}
define i32 @foo(i32 %t, i32 %C) {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8"
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR933
define fastcc i1 @test() {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse | grep movaps
+; RUN: llc < %s -march=x86 -mattr=sse | grep movaps
; Test that the load is NOT folded into the intrinsic, which would zero the top
; elts of the loaded vector.
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define void @_ZN13QFSFileEngine4readEPcx() {
%tmp201 = load i32* null ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep shrl
+; RUN: llc < %s -march=x86 | grep shrl
; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31
; is then optimized away.
@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%struct.function = type opaque
%struct.lang_decl = type opaque
%struct.location_t = type { i8*, i32 }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
define void @test() {
-; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | FileCheck %s
+; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
@str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1]
@str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep {subl \$4, %esp}
+; RUN: llc < %s -march=x86 | grep {subl \$4, %esp}
target triple = "i686-pc-linux-gnu"
@str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep movb %t | count 2
; RUN: grep {movzb\[wl\]} %t
-; RUN: llvm-as < %s | llc -march=x86 | grep test.*1
+; RUN: llc < %s -march=x86 | grep test.*1
; PR1016
define i32 @test(i32 %A, i32 %B, i32 %C) {
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel
; PR1061
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
; PR1075
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define float @foo(float %x) nounwind {
%tmp1 = fmul float %x, 3.000000e+00
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep leaq %t
; RUN: not grep {,%rsp)} %t
; PR1103
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; Test 'ri' constraint.
define void @run_init_process() {
-; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax}
-; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)}
+; RUN: llc < %s -march=x86 | grep {orl \$1, %eax}
+; RUN: llc < %s -march=x86 | grep {leal 3(,%eax,8)}
;; This example can't fold the or into an LEA.
define i32 @test(float ** %tmp2, i32 %tmp12) {
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic
; PR1027
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium3
+; RUN: llc < %s -march=x86 -mcpu=pentium3
define internal fastcc double @ggc_rlimit_bound(double %limit) {
ret double %limit
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps
+; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps
define void @test() nounwind {
test.exit:
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-darwin | \
+; RUN: llc < %s -march=x86 -mtriple=i686-darwin | \
; RUN: grep push | count 3
define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; ModuleID = 'a.bc'
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR1259
define void @test() {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @test(i16 %tmp40414244) {
%tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 )
-; RUN: llvm-as < %s | llc -march=x86 | grep {mov %gs:72, %eax}
+; RUN: llc < %s -march=x86 | grep {mov %gs:72, %eax}
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
-; RUN: llvm-as < %s | llc -mcpu=yonah -march=x86 | \
+; RUN: llc < %s -mcpu=yonah -march=x86 | \
; RUN: grep {cmpltsd %xmm0, %xmm0}
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
-; RUN: llvm-as < %s | llc -march=x86 | grep {psrlw \$8, %xmm0}
+; RUN: llc < %s -march=x86 | grep {psrlw \$8, %xmm0}
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
@data = external global [339 x i64]
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR1314
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim
+; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.__sFILEX = type opaque
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep 4294967112
+; RUN: llc < %s -march=x86-64 | not grep 4294967112
; PR1348
%struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] }
-; RUN: llvm-as < %s | llc -mcpu=yonah
+; RUN: llc < %s -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | count 2
-; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | count 2
+; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep paddq | count 2
+; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep movq | count 2
define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) {
entry:
-; RUN: llvm-as < %s | llc | not grep {bsrl.*10}
+; RUN: llc < %s | not grep {bsrl.*10}
; PR1356
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse
+; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse
; PR1371
@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .12, %esp}
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .12, %esp}
; PR1398
%struct.S = type { i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
%struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }>
%struct.OpaqueXDataStorageType = type opaque
-; RUN: llvm-as < %s | llc -mcpu=yonah
+; RUN: llc < %s -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpckhwd
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpckhwd
declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>)
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep GOTPCREL
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep ".align.*3"
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep GOTPCREL
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep ".align.*3"
%struct.A = type { [1024 x i8] }
@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1]
-; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131
+; RUN: llc < %s -enable-eh -asm-verbose | grep invcont131
; PR 1496: tail merge was incorrectly removing this block
; ModuleID = 'report.1.bc'
; PR1495
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i686 | not grep jmp
+; RUN: llc < %s -march=x86 -mcpu=i686 | not grep jmp
; check that branch folding understands FP_REG_KILL is not a branch
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw
@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
define void @foo(<1 x i64> %A, <1 x i64> %B) {
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2
+; RUN: llc < %s -march=x86-64 -mattr=+sse2
define void @test() {
%tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define void @test() {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define void @test(<4 x float>* %arg) {
%tmp89 = getelementptr <4 x float>* %arg, i64 3
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0}
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1}
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1}
@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
; PR1545
@.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax}
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax}
+; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax}
+; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax}
define i64 @foo_0(<2 x i64>* %val) {
entry:
%val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; <i64*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep movl
+; RUN: llc < %s -march=x86 | not grep movl
define i8 @t(i8 zeroext %x, i8 zeroext %y) zeroext {
%tmp2 = add i8 %x, 2
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r"
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r"
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 }
%struct.PyBoolScalarObject = type { i64, %struct._typeobject*, i8 }
-; RUN: llvm-as < %s | llc -march=x86 | grep {movsbl}
+; RUN: llc < %s -march=x86 | grep {movsbl}
@X = global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep drectve
+; RUN: llc < %s -march=x86 | not grep drectve
; PR1607
%hlvm_programs_element = type { i8*, i32 (i32, i8**)* }
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep "48(%esp)" | count 5
+; RUN: llc < %s -mtriple=i686-apple-darwin | grep "48(%esp)" | count 5
%struct..0anon = type { i32 }
%struct.rtvec_def = type { i32, [1 x %struct..0anon] }
-; RUN: llvm-as < %s | llc -march=x86-64 -enable-eh
+; RUN: llc < %s -march=x86-64 -enable-eh
; PR1632
define void @_Z1fv() {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | not grep {lea\[\[:space:\]\]R}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | not grep {lea\[\[:space:\]\]R}
%struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
%struct.AGenericManager = type <{ i8 }>
-; RUN: llvm-as < %s | llc -march=x86 | grep weak | count 2
+; RUN: llc < %s -march=x86 | grep weak | count 2
@__gthrw_pthread_once = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
declare extern_weak i32 @pthread_once(i32*, void ()*)
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2
%struct.NSString = type { }
%struct._objc__method_prototype_list = type opaque
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep -- -86
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -- -86
define i16 @f(<4 x float>* %tmp116117.i1061.i) nounwind {
entry:
-; RUN: llvm-as < %s | llc | grep powixf2
-; RUN: llvm-as < %s | llc | grep fsqrt
+; RUN: llc < %s | grep powixf2
+; RUN: llc < %s | grep fsqrt
; ModuleID = 'yyy.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 | not grep pushf
+; RUN: llc < %s -march=x86 | not grep pushf
%struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* }
%struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* }
-; RUN: llvm-as < %s | llc -march=x86 | grep lea
+; RUN: llc < %s -march=x86 | grep lea
%struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
%struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
-; RUN: llvm-as < %s | llc -march=x86 | not grep movb
+; RUN: llc < %s -march=x86 | not grep movb
define i16 @f(i32* %bp, i32* %ss) signext {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep addss | not grep esp
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep addss | not grep esp
define fastcc void @fht(float* %fz, i16 signext %n) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep sarl | not grep esp
+; RUN: llc < %s -march=x86 | grep sarl | not grep esp
define i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) signext {
entry:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
%struct._Unwind_Context = type { }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-linux-gnu
; PR1729
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
define i64 @__ashldi3(i64 %u, i64 %b) {
entry:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep movb | not grep x
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep movb | not grep x
; PR1734
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep addb | not grep x
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep cmpb | not grep x
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep addb | not grep x
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep cmpb | not grep x
; PR1734
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR
define i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) signext {
entry:
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR1748
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86 | grep mov | count 1
define i16 @t() signext {
entry:
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2
+; RUN: llc < %s -march=x86 -mattr=sse2
; ModuleID = 'yyy.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%"struct.K::JL" = type <{ i8 }>
%struct.jv = type { i64 }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl | not grep rax
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl | not grep rax
%struct.color_sample = type { i64 }
%struct.gs_matrix = type { float, i64, float, i64, float, i64, float, i64, float, i64, float, i64 }
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR1763
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR1766
%struct.dentry = type { %struct.dentry_operations* }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR1767
define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) {
-; RUN: llvm-as < %s | llc -relocation-model=static | grep {foo _str$}
+; RUN: llc < %s -relocation-model=static | grep {foo _str$}
; PR1761
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep lea
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lea
define float @foo(i32* %x, float* %y, i32 %c) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep imul
+; RUN: llc < %s -march=x86 | not grep imul
%struct.eebb = type { %struct.eebb*, i16* }
%struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* }
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep movl | count 2
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | not grep movb
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att | grep movl | count 2
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att | not grep movb
%struct.double_int = type { i64, i64 }
%struct.tree_common = type <{ i8, [3 x i8] }>
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \
; RUN: grep {1 .*folded into instructions}
; Increment in loop bb.128.i adjusted to 2, to prevent loop reversal from
; kicking in.
-; RUN: llvm-as < %s | llc -march=x86 -stats |& \
+; RUN: llc < %s -march=x86 -stats |& \
; RUN: grep {1 .*folded into instructions}
-; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 4
+; RUN: llc < %s -march=x86 | grep cmp | count 4
%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF
+; RUN: llc < %s -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF
%struct.__sbuf = type { i8*, i32 }
%struct.ggBRDF = type { i32 (...)** }
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu
; PR1799
%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp)} | count 2
+; RUN: llc < %s -march=x86 | grep {(%esp)} | count 2
; PR1872
%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 | not grep pushf
+; RUN: llc < %s -march=x86 | not grep pushf
%struct.indexentry = type { i32, i8*, i8*, i8*, i8*, i8* }
-; RUN: llvm-as < %s | llc -o - | grep sinl
+; RUN: llc < %s -o - | grep sinl
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -regalloc=local
+; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=local
define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep IMPLICIT_DEF
+; RUN: llc < %s -march=x86 | not grep IMPLICIT_DEF
%struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, void (i32, i32)*, i8 (i32, i32)* }
-; RUN: llvm-as < %s | llc -march=x86 | grep nop
+; RUN: llc < %s -march=x86 | grep nop
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR1975
@nodes = external global i64 ; <i64*> [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xor | grep CPI
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xor | grep CPI
define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep andpd | not grep esp
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep andpd | not grep esp
declare double @llvm.sqrt.f64(double) nounwind readnone
-; RUN: llvm-as < %s | llc -march=x86 | grep and
+; RUN: llc < %s -march=x86 | grep and
define i32 @test(i1 %A) {
%B = zext i1 %A to i32 ; <i32> [#uses=1]
%C = sub i32 0, %B ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9
+; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9
; PR1909
@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc | grep {a:} | not grep ax
-; RUN: llvm-as < %s | llc | grep {b:} | not grep ax
+; RUN: llc < %s | grep {a:} | not grep ax
+; RUN: llc < %s | grep {b:} | not grep ax
; PR2078
; The clobber list says that "ax" is clobbered. Make sure that eax isn't
; allocated to the input/output register.
-; RUN: llvm-as < %s | llc -regalloc=local -march=x86 -mattr=+mmx | grep esi
+; RUN: llc < %s -regalloc=local -march=x86 -mattr=+mmx | grep esi
; PR2082
; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
; registers.
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of re-materialization} | grep 3
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of dead spill slots removed}
+; RUN: llc < %s -march=x86 -stats |& grep {Number of re-materialization} | grep 3
+; RUN: llc < %s -march=x86 -stats |& grep {Number of dead spill slots removed}
; rdar://5761454
%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2
; PR2076
define void @h264_h_loop_filter_luma_mmx2(i8* %pix, i32 %stride, i32 %alpha, i32 %beta, i8* %tc0) nounwind {
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
%struct.XX = type <{ i8 }>
%struct.YY = type { i64 }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%struct.CompAtom = type <{ %struct.Position, float, i32 }>
%struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386
+; RUN: llc < %s -march=x86 -mcpu=i386
; PR2122
define float @func(float %a, float %b) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | not grep 255
+; RUN: llc < %s -march=x86 -mcpu=i386 | not grep 255
%struct.CONSTRAINT = type { i32, i32, i32, i32 }
%struct.FIRST_UNION = type { %struct.anon }
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills}
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills}
; PR2134
declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep TLSGD | count 2
+; RUN: llc < %s -relocation-model=pic | grep TLSGD | count 2
; PR2137
; ModuleID = '1.c'
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i16 @t(i32 %depth) signext nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu
; PR2138
%struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1
%struct..0objc_object = type opaque
%struct.OhBoy = type { }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @t() nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
+; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
%struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
%struct.AGenericManager = type <{ i8 }>
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define void @t() {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | grep add | grep 12 | not grep non_lazy_ptr
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | grep add | grep 12 | not grep non_lazy_ptr
; Don't fold re-materialized load into a two address instruction
%"struct.Smarts::Runnable" = type { i32 (...)**, i32 }
-; RUN: llvm-as < %s | llc | grep unnamed_1.eh
+; RUN: llc < %s | grep unnamed_1.eh
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx
+; RUN: llc < %s -march=x86 -mattr=+mmx
define i32 @t2() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep jmp
+; RUN: llc < %s -march=x86 | not grep jmp
%struct..0anon = type { i32 }
%struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local
%struct.CGPoint = type { double, double }
%struct.NSArray = type { %struct.NSObject }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep movw | not grep {, %e}
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep movw | not grep {, %e}
%struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 }
%struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep xorl | grep {%e}
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep xorl | grep {%e}
; Make sure xorl operands are 32-bit registers.
%struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* }
-; RUN: llvm-as < %s | llc -march=x86 | not grep 120
+; RUN: llc < %s -march=x86 | not grep 120
; Don't accidentally add the offset twice for trailing bytes.
%struct.S63 = type { [63 x i8] }
-; RUN: llvm-as < %s | llc -mattr=+sse41
+; RUN: llc < %s -mattr=+sse41
; rdar://5886601
; gcc testsuite: gcc.target/i386/sse4_1-pblendw.c
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc | grep {1 \$2 3}
+; RUN: llc < %s | grep {1 \$2 3}
; rdar://5720231
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl > %t
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl > %t
; RUN: not grep {r\[abcd\]x} %t
; RUN: not grep {r\[ds\]i} %t
; RUN: not grep {r\[bs\]p} %t
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i64 @t(i64 %maxIdleDuration) nounwind {
call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind
-; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86 | grep jnp
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp
; rdar://5902801
declare void @test2()
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define fastcc void @glgVectorFloatConversion() nounwind {
%tmp12745 = load <4 x float>* null, align 16 ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc | grep abort | count 1
+; RUN: llc < %s | grep abort | count 1
; Calls to abort should all be merged
; ModuleID = '5898899.c'
-; RUN: llvm-as < %s | llc -march=x86 -O0 -fast-isel=false | grep mov | count 5
+; RUN: llc < %s -march=x86 -O0 -fast-isel=false | grep mov | count 5
; PR2343
%llvm.dbg.anchor.type = type { i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movups | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movups | count 2
define void @a(<4 x float>* %x) nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR2289
define void @_ada_ca11001() {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -regalloc=local
+; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=local
@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x i32 (...)*] ; <[5 x i32 (...)*]*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24
%struct.argument_t = type { i8*, %struct.argument_t*, i32, %struct.ipc_type_t*, i32, void (...)*, void (...)*, void (...)*, void (...)*, void (...)*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, %struct.routine*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, i32, i32, i32, i32, i32, i32 }
%struct.ipc_type_t = type { i8*, %struct.ipc_type_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, %struct.ipc_type_t*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
-; RUN: llvm-as < %s | llc -march=x86 | not grep movsd
-; RUN: llvm-as < %s | llc -march=x86 | grep movw
-; RUN: llvm-as < %s | llc -march=x86 | grep addw
+; RUN: llc < %s -march=x86 | not grep movsd
+; RUN: llc < %s -march=x86 | grep movw
+; RUN: llc < %s -march=x86 | grep addw
; These transforms are turned off for volatile loads and stores.
; Check that they weren't turned off for all loads and stores!
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 5
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movl | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 5
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movl | count 2
@atomic = global double 0.000000e+00 ; <double*> [#uses=1]
@atomic2 = global double 0.000000e+00 ; <double*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 4
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 4
define i16 @test(i16* %tmp179) nounwind {
%tmp180 = load i16* %tmp179, align 2 ; <i16> [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw
+; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw
; Test to make sure we actually insert the bottom element of the vector
define <8 x i16> @a(<8 x i16> %a) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep pslldq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep pslldq
define void @t() nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+; RUN: llc < %s -mtriple=i386-apple-darwin9
%struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
%struct.res_state = type { i32, i32, i32, i32, float*, float*, i32, i32 }
-; RUN: llvm-as < %s | llc | grep ax
+; RUN: llc < %s | grep ax
; PR2024
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc -march=x86-64 -o - | not grep shr
+; RUN: llc < %s -march=x86-64 -o - | not grep shr
define i128 @sl(i128 %x) {
%t = shl i128 %x, 1
ret i128 %t
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static -disable-fp-elim | FileCheck %s
+; RUN: llc < %s -march=x86 -relocation-model=static -disable-fp-elim | FileCheck %s
; PR2536
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
%struct.SV = type { i8*, i64, i64 }
@"\01LC25" = external constant [8 x i8] ; <[8 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1
; PR2539
external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
; PR2566
external global i16 ; <i16*>:0 [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium
+; RUN: llc < %s -march=x86 -mcpu=pentium
; PR2575
define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 56
+; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 56
; PR2568
@g_3 = external global i16 ; <i16*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2596
@data = external global [400 x i64] ; <[400 x i64]*> [#uses=5]
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movzbl
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movzbl
define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
@var = external global i64 ; <i64*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
%struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* }
%struct.QBasicAtomic = type { i32 }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movd | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq
; PR2677
-; RUN: llvm-as < %s | llc -mcpu=core2 | grep pxor | count 2
-; RUN: llvm-as < %s | llc -mcpu=core2 | not grep movapd
+; RUN: llc < %s -mcpu=core2 | grep pxor | count 2
+; RUN: llc < %s -mcpu=core2 | not grep movapd
; PR2715
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
; Check that eh_return & unwind_init were properly lowered
-; RUN: llvm-as < %s | llc | grep %ebp | count 7
-; RUN: llvm-as < %s | llc | grep %ecx | count 5
+; RUN: llc < %s | grep %ebp | count 7
+; RUN: llc < %s | grep %ecx | count 5
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i386-pc-linux"
; Check that eh_return & unwind_init were properly lowered
-; RUN: llvm-as < %s | llc | grep %rbp | count 5
-; RUN: llvm-as < %s | llc | grep %rcx | count 3
+; RUN: llc < %s | grep %rbp | count 5
+; RUN: llc < %s | grep %rcx | count 3
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1
; PR2687
define <2 x double> @a(<2 x i32> %x) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin
+; RUN: llc < %s -mtriple=i386-apple-darwin
; PR2757
@g_3 = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2783
@g_15 = external global i16 ; <i16*> [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2748
@g_73 = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep "movl %eax, %eax"
-; RUN: llvm-as < %s | llc -march=x86 | not grep "movl %edx, %edx"
-; RUN: llvm-as < %s | llc -march=x86 | not grep "movl (%eax), %eax"
-; RUN: llvm-as < %s | llc -march=x86 | not grep "movl (%edx), %edx"
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl %eax, %eax"
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl %edx, %edx"
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl (%eax), %eax"
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl (%edx), %edx"
+; RUN: llc < %s -march=x86 | not grep "movl %eax, %eax"
+; RUN: llc < %s -march=x86 | not grep "movl %edx, %edx"
+; RUN: llc < %s -march=x86 | not grep "movl (%eax), %eax"
+; RUN: llc < %s -march=x86 | not grep "movl (%edx), %edx"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %eax, %eax"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %edx, %edx"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%eax), %eax"
+; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%edx), %edx"
; %0 must not be put in EAX or EDX.
; In the first asm, $0 and $2 must not be put in EAX.
-; RUN: llvm-as < %s | llc -march=x86 | grep "#%ebp %edi %esi 8(%edx) %eax (%ebx)"
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep "#%edi %edx %ebp 8(%ebx) %eax (%esi)"
+; RUN: llc < %s -march=x86 | grep "#%ebp %edi %esi 8(%edx) %eax (%ebx)"
+; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %edx %ebp 8(%ebx) %eax (%esi)"
; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers
; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
; operand. There are many combinations that work; this is what llc puts out now.
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin
+; RUN: llc < %s -mtriple=i386-apple-darwin
; PR2808
@g_3 = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movs | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep fld | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
; check 'inreg' attribute for sse_regparm
define double @foo1() inreg nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+; RUN: llc < %s -mtriple=i386-apple-darwin9
%struct._Unwind_Context = type { [18 x i8*], i8*, i8*, i8*, %struct.dwarf_eh_bases, i32, i32, i32, [18 x i8] }
%struct._Unwind_Exception = type { i64, void (i32, %struct._Unwind_Exception*)*, i32, i32, [3 x i32] }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
%struct..0objc_selector = type opaque
%struct.NSString = type opaque
-; RUN: llvm-as < %s | llc -march=x86 | not grep movz
+; RUN: llc < %s -march=x86 | not grep movz
; PR2835
@g_407 = internal global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
;; This version includes 64-bit version of binary operators (in 32-bit mode).
;; Swap, cmp-and-swap not supported yet in this mode.
; ModuleID = 'Atomics.c'
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2
; PR2850
@tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2]
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl
; This NaN should be shortened to a double (not a float).
declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3
; it is not safe to shorten any of these NaNs.
declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
define <4 x float> @f(float %w) nounwind {
entry:
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2735
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2775
define i32 @func_77(i8 zeroext %p_79) nounwind {
-; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edx}
+; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edx}
%struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
%struct.XXDAlphaTest = type { float, i16, i8, i8 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
; PR2762
define void @foo(<4 x i32>* %p, <4 x double>* %q) {
%n = load <4 x i32>* %p
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
define void @test(i64 %x) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
; from gcc.c-torture/compile/920520-1.c
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp}
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp}
define void @f(float %wt) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
define fastcc void @fourn(double* %data, i32 %isign) nounwind {
entry:
; Until it does, we shouldn't use movaps to access the stack. On targets with
; sufficiently aligned stack (e.g. darwin) we should.
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2977
define i8* @ap_php_conv_p2(){
entry:
-; RUN: llvm-as < %s | llc -march=x86 -o - | not grep 10
+; RUN: llc < %s -march=x86 -o - | not grep 10
declare void @llvm.va_start(i8*) nounwind
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep testb
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu
; PR 1779
; Using 'A' constraint and a tied constraint together used to crash.
; ModuleID = '<stdin>'
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep "jns" | count 1
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep "jns" | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR3124
%struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, i8, i8, i8, i32, i32, [9 x i32], [16 x i8], [64 x i8], i32, i32, i32, i64, %struct.cpumask_t, i16, i16, i16, i16, i16, i16, i16, i16, i32 }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep lea
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep lea
; The inner loop should use [reg] addressing, not [reg+reg] addressing.
; rdar://6403965
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR3117
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
-; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
-; RUN: llvm-as < %s | llc -march=x86 | grep add | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep sub | grep -v subsections | count 1
+; RUN: llc < %s -march=x86 | grep add | count 2
+; RUN: llc < %s -march=x86 | grep sub | grep -v subsections | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; this should be rearranged to have two +s and one -
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic
+; RUN: llc < %s -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic
%struct.XXActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
%struct.XXAlphaTest = type { float, i16, i8, i8 }
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | grep ^.L_Z1fv.eh
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-unknown-linux-gnu | grep ^.L_Z1fv.eh
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | grep ^.L_Z1fv.eh
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu | grep ^.L_Z1fv.eh
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh
define void @_Z1fv() {
entry:
-; RUN: llvm-as < %s | llc | not grep shrl
+; RUN: llc < %s | not grep shrl
; Note: this test is really trying to make sure that the shift
; returns the right result; shrl is most likely wrong,
; but if CodeGen starts legitimately using an shrl here,
-; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
; PR3149
; Make sure the copy after inline asm is not coalesced away.
-; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; -(-a) - a should be found and removed, leaving refs to only L and P
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | grep {lea.*X.*esp} | count 2
+; RUN: llc < %s -march=x86 -relocation-model=static | grep {lea.*X.*esp} | count 2
@X = external global [0 x i32]
-; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 4
+; RUN: llc < %s -march=x86 | grep "(%esp)" | count 4
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu | grep movq | count 2
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | grep movq | count 2
; PR3311
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking
declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin
+; RUN: llc < %s -mtriple=i386-apple-darwin
; rdar://6501631
%CF = type { %Register }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; rdar://6505632
; reduced from 483.xalancbmk
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=-sse,-sse2 | not grep xmm
+; RUN: llc < %s -march=x86-64 -mattr=-sse,-sse2 | not grep xmm
; PR3402
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -enable-legalize-types-checking
+; RUN: llc < %s -march=x86 -enable-legalize-types-checking
; PR3393
define void @foo(i32 inreg %x) {
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
; CHECK: .section __TEXT,__cstring,cstring_literals
@x = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim
; rdar://6538384
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
-; RUN: llvm-as < %s | llc -march=x86 | not grep and
+; RUN: llc < %s -march=x86 | not grep and
; PR3401
define void @x(i288 %i) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 | grep {mov.*56}
+; RUN: llc < %s -march=x86 | grep {mov.*56}
; PR3449
define void @test(<8 x double>* %P, i64* %Q) nounwind {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3450
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3453
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3411
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc | grep { - 92}
+; RUN: llc < %s | grep { - 92}
; PR3481
; The offset should print as -92, not +17179869092
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movss | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movaps | count 4
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movaps | count 4
define i1 @t([2 x float]* %y, [2 x float]* %w, i32, [2 x float]* %x.pn59, i32 %smax190, i32 %j.1180, <4 x float> %wu.2179, <4 x float> %wr.2178, <4 x float>* %tmp89.out, <4 x float>* %tmp107.out, i32* %indvar.next218.out) nounwind {
newFuncRoot:
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1
+; RUN: llc < %s -march=x86 -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1
; rdar://6566708
target triple = "i386-apple-darwin9.6"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3486
define i32 @foo(i8 signext %p_26) nounwind {
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR3537
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
-; RUN: llvm-as < %s | llc
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s
+; RUN: llc < %s -march=x86-64
; PR3538
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9"
-; RUN: llvm-as < %s | llc -march=x86 | grep {\$-81920} | count 3
-; RUN: llvm-as < %s | llc -march=x86 | grep {\$4294885376} | count 1
+; RUN: llc < %s -march=x86 | grep {\$-81920} | count 3
+; RUN: llc < %s -march=x86 | grep {\$4294885376} | count 1
; ModuleID = 'shant.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin8
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8
; PR3561
define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split
define i32 @main() nounwind {
bb4.i.thread:
-; RUN: llvm-as < %s | llc | grep weak | count 3
+; RUN: llc < %s | grep weak | count 3
; PR3629
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& not grep commuted
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep commuted
; rdar://6608609
define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone {
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse3 -stats |& not grep {machine-licm}
+; RUN: llc < %s -march=x86-64 -mattr=+sse3 -stats |& not grep {machine-licm}
; rdar://6627786
target triple = "x86_64-apple-darwin10.0"
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; rdar://6642541
%struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer }
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3686
; rdar://6661799
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep xmm
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
; This should do a single load into the fp stack for the return, not diddle with xmm registers.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR3763
%struct.__block_descriptor = type { i64, i64 }
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu
; PR3706
define void @__mulxc3(x86_fp80 %b) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
; rdar://r6661945
%struct.WINDOW = type { i16, i16, i16, i16, i16, i16, i16, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.ldat*, i16, i16, i32, i32, %struct.WINDOW*, %struct.pdat, i16, %struct.cchar_t }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting
@lookupTable5B = external global [64 x i32], align 32 ; <[64 x i32]*> [#uses=1]
@lookupTable3B = external global [16 x i32], align 32 ; <[16 x i32]*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 | not grep {.space}
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | not grep {.space}
; rdar://6668548
declare double @llvm.sqrt.f64(double) nounwind readonly
-; RUN: llvm-as < %s | llc -march=x86 | grep -A 2 {call.*f} | grep movl
+; RUN: llc < %s -march=x86 | grep -A 2 {call.*f} | grep movl
; Check the register copy comes after the call to f and before the call to g
; PR3784
-; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
+; RUN: llc < %s -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
; Check that register copies in the landing pad come after the EH_LABEL
declare i32 @f()
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded}
+; RUN: llc < %s -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded}
; rdar://6682365
; Do not clobber a register if another spill slot is available in it and it's marked "do not clobber".
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -O0
+; RUN: llc < %s -mtriple=i386-apple-darwin -O0
define fastcc void @optimize_bit_field() nounwind {
bb4:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static -stats -info-output-file - > %t
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -stats -info-output-file - > %t
; RUN: not grep spill %t
; RUN: not grep {%rsp} %t
; RUN: not grep {%rbp} %t
-; RUN: llvm-as < %s | llc -march=x86 -o %t
+; RUN: llc < %s -march=x86 -o %t
; RUN: not grep and %t
; RUN: not grep shr %t
; rdar://6661955
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define double @t(double %x) nounwind ssp noimplicitfloat {
entry:
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; rdar://6774324
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin10.0"
-; RUN: llvm-as < %s | llc -fast-isel
+; RUN: llc < %s -fast-isel
; radr://6772169
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t
; RUN: grep leaq %t | count 1
@dst = external global [131072 x i32]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin
+; RUN: llc < %s -mtriple=i386-apple-darwin
; rdar://6781755
; PR3934
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; rdar://6781755
; PR3934
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil
+; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil
; rdar://6787136
%struct.X = type { i8, [32 x i8] }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of modref unfolded}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of modref unfolded}
; XFAIL: *
; 69408 removed the opportunity for this optimization to work
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of registers downgraded}
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of registers downgraded}
; rdar://6802189
; Test if linearscan is unfavoring registers for allocation to allow more reuse
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t
; RUN: grep {leal.*TLSGD.*___tls_get_addr} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2
; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2
; PR4004
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
; rdar://6806252
define i64 @test(i32* %tmp13) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR4034
%struct.BiContextType = type { i16, i8 }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+; RUN: llc < %s -mtriple=i386-apple-darwin9
; PR4056
define void @int163(i32 %p_4, i32 %p_5) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+; RUN: llc < %s -mtriple=i386-apple-darwin9
; PR4051
define void @int163(i32 %p_4, i32 %p_5) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax
; PR4076
type { i8, i8, i8 } ; type %0
-; RUN: llvm-as < %s | llc | grep {movl.*%ebx, 8(%esi)}
+; RUN: llc < %s | grep {movl.*%ebx, 8(%esi)}
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.0"
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10
+; RUN: llc < %s -mtriple=i386-apple-darwin10
; rdar://6837009
type { %struct.pf_state*, %struct.pf_state*, %struct.pf_state*, i32 } ; type %0
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic
; PR4099
type { [62 x %struct.Bitvec*] } ; type %0
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-unknown-linux-gnu
+; RUN: llc < %s -march=x86 -mtriple=i386-unknown-linux-gnu
; PR3995
%struct.vtable = type { i32 (...)** }
-; RUN: llvm-as < %s | llc -relocation-model=static > %t
+; RUN: llc < %s -relocation-model=static > %t
; RUN: grep "1: ._pv_cpu_ops+8" %t
; RUN: grep "2: ._G" %t
; PR4152
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR4188
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR3886
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep atoi | grep PLT
+; RUN: llc < %s -relocation-model=pic | grep atoi | grep PLT
; PR4253
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc | grep -E {sar|shl|mov|or} | count 4
+; RUN: llc < %s | grep -E {sar|shl|mov|or} | count 4
; Check that the shr(shl X, 56), 48) is not mistakenly turned into
; a shr (X, -8) that gets subsequently "optimized away" as undef
; PR4254
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
%struct.tempsym_t = type { i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep {movzbl %\[abcd\]h,}
+; RUN: llc < %s -march=x86-64 | not grep {movzbl %\[abcd\]h,}
define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind {
newFuncRoot:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -disable-fp-elim
; PR4225
define void @sha256_block1(i32* nocapture %arr, i8* nocapture %in, i64 %num) nounwind {
-; RUN: llvm-as < %s | llc | grep "subq.*\\\$40, \\\%rsp"
+; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp"
target triple = "x86_64-mingw64"
define x86_fp80 @a(i64 %x) nounwind readnone {
-; RUN: llvm-as < %s | llc -o %t1
+; RUN: llc < %s -o %t1
; RUN: grep "subq.*\\\$72, \\\%rsp" %t1
; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1
; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
type { %struct.GAP } ; type %0
type { i16, i8, i8 } ; type %1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | not grep movl
+; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl
define <8 x i8> @a(i8 zeroext %x) nounwind {
%r = insertelement <8 x i8> undef, i8 %x, i32 0
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2 > %t1
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 > %t1
; RUN: grep movzwl %t1 | count 2
; RUN: grep movzbl %t1 | count 2
; RUN: grep movd %t1 | count 4
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
define <2 x i64> @_mm_insert_epi16(<2 x i64> %a, i32 %b, i32 %imm) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse
+; RUN: llc < %s -march=x86 -mattr=+sse
; PR2598
define <2 x float> @a(<2 x i32> %i) nounwind {
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
define <2 x i64> @_mm_movpi64_pi64(<1 x i64> %a, <1 x i64> %b) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movl | count 2
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep movl | count 2
define i64 @a(i32 %a, i32 %b) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
-; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
+; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
+; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
; calling convention out of sync with standard c calling convention on x86_64)
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | not grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | not grep TAILCALL
; Bug 4396. This tail call can NOT be optimized.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
; PR2484
define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=x86_64-unknown-freebsd7.2
+; RUN: llc < %s -march=x86 -mtriple=x86_64-unknown-freebsd7.2
; PR4478
%struct.sockaddr = type <{ i8, i8, [14 x i8] }>
-; RUN: llvm-as < %s | llc -march=x86 -disable-mmx
+; RUN: llc < %s -march=x86 -disable-mmx
define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind {
%D = icmp sgt <2 x i32> %A, %B
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3037
define void @entry(<4 x i8>* %dest) {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
%struct.ANY = type { i8* }
%struct.AV = type { %struct.XPVAV*, i32, i32 }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
; rdar://7059496
%struct.brinfo = type <{ %struct.brinfo*, %struct.brinfo*, i8*, i32, i32, i32, i8, i8, i8, i8 }>
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; CHECK: _foo:
; CHECK: pavgw LCPI1_4(%rip)
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -disable-fp-elim -color-ss-with-regs | not grep dil
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -disable-fp-elim -color-ss-with-regs | not grep dil
; PR4552
target triple = "i386-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR4583
define i32 @atomic_cmpset_long(i64* %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10
; PR4587
; rdar://7072590
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
@bsBuff = internal global i32 0 ; <i32*> [#uses=1]
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR4669
declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32)
-; RUN: llvm-as < %s | llc -O3
+; RUN: llc < %s -O3
; PR4626
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR4668
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-mingw64 | grep movabsq
+; RUN: llc < %s -mtriple=x86_64-mingw64 | grep movabsq
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-; RUN: llvm-as < %s | llc | grep LJT
+; RUN: llc < %s | grep LJT
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
target triple = "x86_64-mingw"
; ModuleID = 'mm.bc'
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-pc-linux | FileCheck %s
+; RUN: llc < %s -march=x86 -mtriple=i386-pc-linux | FileCheck %s
@a = external global i96, align 4
@b = external global i64, align 8
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR4753
; This function has a sub-register reuse undone.
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-freebsd7.2 -code-model=kernel | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2 -code-model=kernel | FileCheck %s
; PR4689
%struct.__s = type { [8 x i8] }
-; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=pic > %t
+; RUN: llc < %s -march=x86-64 -relocation-model=pic > %t
; RUN: grep {movswl %ax, %edi} %t
; RUN: grep {movw (%rax), %ax} %t
; XFAIL: *
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
;; Note the 64-bit variants are not supported yet (in 32-bit mode).
; ModuleID = 'Atomics.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; ModuleID = 'Atomics.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
-; RUN: llvm-as < %s | llc -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC
@src = external global [131072 x i32]
@dst = external global [131072 x i32]
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: not grep add %t
; RUN: grep subl %t | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep add %t
; RUN: grep subq %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep {jb} | count 2
-; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {jo} | count 2
-; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {jb} | count 2
+; RUN: llc < %s -march=x86 | grep {jo} | count 2
+; RUN: llc < %s -march=x86 | grep {jb} | count 2
+; RUN: llc < %s -march=x86 -O0 | grep {jo} | count 2
+; RUN: llc < %s -march=x86 -O0 | grep {jb} | count 2
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 | grep {array,16512,7}
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep {array,16512,7}
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin8 | not grep {7}
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep {array,16512,7}
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep {array,16512,7}
+; RUN: llc < %s -mtriple=i386-apple-darwin8 | not grep {7}
; Darwin 9+ should get alignment on common symbols. Darwin8 does
; not support this.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 | grep pcmpeqd | count 4
+; RUN: llc < %s -march=x86 -mattr=sse2 | grep pcmpeqd | count 4
define <4 x i32> @ioo() nounwind {
ret <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin | grep and | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | grep and | count 1
+; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1
declare void @bar(<2 x i64>* %n)
-; RUN: llvm-as < %s | llc -march=x86 | grep and | count 1
+; RUN: llc < %s -march=x86 | grep and | count 1
; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1
; in this case.
-; RUN: llvm-as < %s | llc -march=x86 | grep {(%} | count 1
+; RUN: llc < %s -march=x86 | grep {(%} | count 1
; Don't duplicate the load.
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep mov %t | count 8
; RUN: not grep implicit %t
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movzbl | count 2
+; RUN: llc < %s -march=x86-64 | grep movzbl | count 2
; Use movzbl to avoid partial-register updates.
; This should compile to movl $2147483647, %eax + andl only.
-; RUN: llvm-as < %s | llc | grep andl
-; RUN: llvm-as < %s | llc | not grep movsd
-; RUN: llvm-as < %s | llc | grep esp | not grep add
+; RUN: llc < %s | grep andl
+; RUN: llc < %s | not grep movsd
+; RUN: llc < %s | grep esp | not grep add
; rdar://5736574
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \
+; RUN: llc < %s -march=x86 -relocation-model=static | \
; RUN: grep {test1 \$_GV}
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \
+; RUN: llc < %s -march=x86 -relocation-model=static | \
; RUN: grep {test2 _GV}
; PR882
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2267
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
-; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
-; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
+; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
+; RUN: llc < %s -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
+; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
; PR3379
; XFAIL: *
-; RUN: llvm-as < %s | llc | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; ModuleID = 'asm.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
; rdar://7103704
-; RUN: llvm-as < %s | llc -march=x86 -o %t1
+; RUN: llc < %s -march=x86 -o %t1
; RUN: grep "lock" %t1 | count 17
; RUN: grep "xaddl" %t1 | count 4
; RUN: grep "cmpxchgl" %t1 | count 13
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
declare i32 @foo()
@G0 = global i32 ()* @foo, section ".init_array"
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal.*-2(\[%\]rdi,\[%\]rdi)}
+; RUN: llc < %s -march=x86-64 | grep {leal.*-2(\[%\]rdi,\[%\]rdi)}
define i32 @foo(i32 %x) nounwind readnone {
%t0 = shl i32 %x, 1
-; RUN: llvm-as < %s | llc -march=x86 | grep align | count 3
+; RUN: llc < %s -march=x86 | grep align | count 3
@x = external global i32* ; <i32**> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep align | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep align | count 1
@A = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i1 @foo(i64 %a)
{
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
; PR1033
define i64 @test1(double %t) {
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep rsp
+; RUN: llc < %s -march=x86-64 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 | not grep rsp
define i64 @test1(double %A) {
%B = bitcast double %A to i64
-; RUN: llvm-as < %s | llc -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies=false > %t
+; RUN: llc < %s -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies=false > %t
; RUN: grep {%xmm0} %t | count 14
; RUN: not grep {%xmm1} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies > %t
+; RUN: llc < %s -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies > %t
; RUN: grep {%xmm0} %t | count 7
; RUN: grep {%xmm1} %t | count 7
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep APP %t
; RUN: grep bswapq %t | count 2
; RUN: grep bswapl %t | count 1
; bswap should be constant folded when it is passed a constant argument
-; RUN: llvm-as < %s | llc -march=x86 | \
+; RUN: llc < %s -march=x86 | \
; RUN: grep bswapl | count 3
-; RUN: llvm-as < %s | llc -march=x86 | grep rolw | count 1
+; RUN: llc < %s -march=x86 | grep rolw | count 1
declare i16 @llvm.bswap.i16(i16)
-; RUN: llvm-as < %s | llc -march=x86 | grep btl | count 28
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium4 | grep btl | not grep esp
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn | grep btl | not grep esp
+; RUN: llc < %s -march=x86 | grep btl | count 28
+; RUN: llc < %s -march=x86 -mcpu=pentium4 | grep btl | not grep esp
+; RUN: llc < %s -march=x86 -mcpu=penryn | grep btl | not grep esp
; PR3253
; The register+memory form of the BT instruction should be usable on
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rsp), %rax}
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86-64 | grep {movq 8(%rsp), %rax}
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {movl 8(%esp), %edx} %t
; RUN: grep {movl 4(%esp), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64,
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
-; RUN: llvm-as < %s | llc -march=x86 | grep add | not grep 16
+; RUN: llc < %s -march=x86 | grep add | not grep 16
%struct.W = type { x86_fp80, x86_fp80 }
@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | egrep {add|lea} | grep 16
+; RUN: llc < %s -march=x86 -mcpu=yonah | egrep {add|lea} | grep 16
%struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
<2 x i64> }
-; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678}
-; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678}
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678}
+; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678}
+; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678}
+; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678}
; Call to immediate is not safe on x86-64 unless we *know* that the
; call will be within 32-bits pcrel from the dest immediate.
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {call.*\*%rax}
+; RUN: llc < %s -march=x86-64 | grep {call.*\*%rax}
; PR3666
; PR3773
-; RUN: llvm-as < %s | llc -march=x86 -disable-fp-elim | grep subl | count 1
+; RUN: llc < %s -march=x86 -disable-fp-elim | grep subl | count 1
%struct.decode_t = type { i8, i8, i8, i8, i16, i8, i8, %struct.range_t** }
%struct.range_t = type { float, float, i32, i32, i32, [0 x i8] }
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep {cmpq \$-478,} %t
; RUN: not grep inc %t
; RUN: not grep {leal 1(} %t
-; RUN: llvm-as < %s | llc -march=x86 | grep bsr | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep bsf
-; RUN: llvm-as < %s | llc -march=x86 | grep cmov | count 3
+; RUN: llc < %s -march=x86 | grep bsr | count 2
+; RUN: llc < %s -march=x86 | grep bsf
+; RUN: llc < %s -march=x86 | grep cmov | count 3
define i32 @t1(i32 %x) nounwind {
%tmp = tail call i32 @llvm.ctlz.i32( i32 %x )
-; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep test | count 1
+; RUN: llc < %s -march=x86 | grep cmp | count 1
+; RUN: llc < %s -march=x86 | grep test | count 1
define i32 @f1(i32 %X, i32* %y) {
%tmp = load i32* %y ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep -v cmp
+; RUN: llc < %s -march=x86-64 | grep -v cmp
define i64 @foo(i64 %x) {
%t = icmp eq i64 %x, 0
-; RUN: llvm-as < %s | llc -march=x86-64 | grep -v cmp
+; RUN: llc < %s -march=x86-64 | grep -v cmp
define i64 @foo(i64 %x) {
%t = icmp slt i64 %x, 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2
define i32 @test(double %A) nounwind {
entry:
-; RUN: llvm-as < %s | llc | grep {movl %esp, %eax}
+; RUN: llc < %s | grep {movl %esp, %eax}
; PR4572
; Don't coalesce with %esp if it would end up putting %esp in
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
; PR1877
@NNTOT = weak global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep paddw | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
+; RUN: llc < %s -march=x86-64 | grep paddw | count 2
+; RUN: llc < %s -march=x86-64 | not grep mov
; The 2-addr pass should ensure that identical code is produced for these functions
; no extra copy should be generated.
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6
%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
; PR1501
define float @foo(i32* %x, float* %y, i32 %c) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
define i32 @t() {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 | not grep movaps
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | not grep movaps
; rdar://6509240
type { %struct.TValue } ; type %0
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep xor | count 3
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xor | count 3
@val = internal global i64 0 ; <i64*> [#uses=1]
@"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00" ; <[7 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR4297
target datalayout =
-; RUN: llvm-as < %s | llc -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
-; RUN: llvm-as < %s | llc -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
+; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
+; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep fldl | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1
define double @doload64(i64 %x) nounwind {
%tmp717 = bitcast i64 %x to double
-; RUN: llvm-as < %s | llc -march=x86-64 -combiner-global-alias-analysis -combiner-alias-analysis
+; RUN: llc < %s -march=x86-64 -combiner-global-alias-analysis -combiner-alias-analysis
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
%struct.Hash_Key = type { [4 x i32], i32 }
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 | FileCheck %s
define i32 @test1(i32 %x, i32 %n, i32 %w, i32 %v) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps
@a = external global <2 x i64> ; <<2 x i64>*> [#uses=1]
; insertion of register-register copies.
; Make sure there are only 3 mov's for each testcase
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {\\\<mov\\\>} | count 6
-; RUN: llvm-as < %s | llc -march=x86 | not grep add
+; RUN: llc < %s -march=x86 | not grep add
define i1 @X(i32 %X) {
%Y = add i32 %X, 14 ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | \
+; RUN: llc < %s -march=x86 -mcpu=yonah | \
; RUN: grep movsd | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | \
+; RUN: llc < %s -march=x86 -mcpu=yonah | \
; RUN: grep ucomisd
declare i1 @llvm.isunordered.f64(double, double)
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep no_dead_strip | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep no_dead_strip | count 1
; We should have a .no_dead_strip directive for Z but not for X/Y.
@X = internal global i8 4
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2
+; RUN: llc < %s -march=x86 | grep mov | count 2
define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
entry:
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-; RUN: llvm-as < %s | llc | grep {LCPI1_0(,%eax,4)}
+; RUN: llc < %s | grep {LCPI1_0(,%eax,4)}
define float @f(i32 %x) nounwind readnone {
entry:
%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
ret float %iftmp.0.0
}
-; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax}
+; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax}
define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
entry:
%0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3
-; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc < %s -march=x86-64 | grep LCPI | count 3
+; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep LCPI | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12
declare float @qux(float %y)
-; RUN: llvm-as < %s | llc
-; RUN: llvm-as < %s | llc -fast-isel
-; RUN: llvm-as < %s | llc -march=x86-64
-; RUN: llvm-as < %s | llc -fast-isel -march=x86-64
+; RUN: llc < %s
+; RUN: llc < %s -fast-isel
+; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -fast-isel -march=x86-64
; PR4466
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86-64 -o %t -stats -info-output-file - | \
+; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \
; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
; RUN: grep {leal 1(\%rsi),} %t
-; RUN: llvm-as < %s | llc | not grep orpd
-; RUN: llvm-as < %s | llc | grep andpd | count 1
+; RUN: llc < %s | not grep orpd
+; RUN: llc < %s | grep andpd | count 1
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31
+; RUN: llc < %s -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31
%CC = type { %Register }
%II = type { %"struct.XX::II::$_74" }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep comm
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep comm
; rdar://6479858
@str1 = internal constant [1 x i8] zeroinitializer
-; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1}
+; RUN: llc < %s -march=x86 | grep {orl \$1}
; PR3018
define i32 @test(i32 %A) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx -o %t
; RUN: grep unpcklpd %t | count 1
; RUN: grep movapd %t | count 1
; RUN: grep movaps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats |& grep asm-printer | grep 14
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats |& grep asm-printer | grep 14
define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 | grep __bzero
+; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep __bzero
declare void @llvm.memset.i32(i8*, i8, i32, i32)
-; RUN: llvm-as < %s | llc | grep no_dead_strip
+; RUN: llc < %s | grep no_dead_strip
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8.7.2"
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep stub
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | not grep stub
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep stub
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | not grep stub
@"\01LC" = internal constant [13 x i8] c"Hello World!\00" ; <[13 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep 365384439
+; RUN: llc < %s -march=x86 | grep 365384439
define i32 @f9188_mul365384439_shift27(i32 %A) {
%tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 8
+; RUN: llc < %s -march=x86-64 | grep div | count 8
define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) {
%r = sdiv i64 %x, %y
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-mingw32 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s
declare dllimport void @foo()
-; RUN: llvm-as < %s | llc -march=x86 | not egrep {\\\$4294967289|-7}
-; RUN: llvm-as < %s | llc -march=x86 | egrep {\\\$4294967280|-16}
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {\\-16}
+; RUN: llc < %s -march=x86 | not egrep {\\\$4294967289|-7}
+; RUN: llc < %s -march=x86 | egrep {\\\$4294967280|-16}
+; RUN: llc < %s -march=x86-64 | grep {\\-16}
define void @t() nounwind {
A:
-; RUN: llvm-as < %s | llc -march=x86-64 | grep call
+; RUN: llc < %s -march=x86-64 | grep call
; PR4688
; Return types can be empty structs, which can be awkward.
-; RUN: llvm-as < %s | llc -march=x86 | not grep lea
-; RUN: llvm-as < %s | llc -march=x86 | grep {movl %ebp}
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86 | grep {movl %ebp}
declare void @bar(<2 x i64>* %n)
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep movzx | count 1
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep movsx | count 1
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1
@G1 = internal global i8 0 ; <i8*> [#uses=1]
@G2 = internal global i8 0 ; <i8*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep weak_reference | count 2
+; RUN: llc < %s -mtriple=i686-apple-darwin | grep weak_reference | count 2
@Y = global i32 (i8*)* @X ; <i32 (i8*)**> [#uses=0]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mul | count 2
+; RUN: llc < %s -march=x86-64 | grep mul | count 2
define i128 @i64_sext_i128(i64 %a, i64 %b) {
%aa = sext i64 %a to i128
-; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 2
+; RUN: llc < %s -march=x86 | grep mul | count 2
define i64 @i32_sext_i64(i32 %a, i32 %b) {
%aa = sext i32 %a to i64
-; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=core2 -o %t
+; RUN: llc < %s -march=x86-64 -mcpu=core2 -o %t
; RUN: not grep unpcklps %t
define i32 @foo() nounwind {
-; RUN: llvm-as < %s | llc -march=x86 >/dev/null
+; RUN: llc < %s -march=x86 >/dev/null
; PR4699
; Handle this extractvalue-of-extractvalue case without getting in
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; Examples that exhibits a bug in DAGCombine. The case is triggered by the
; following program. The bug is DAGCombine assumes that the bit convert
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn > %t
+; RUN: llc < %s -march=x86 -mcpu=penryn > %t
; RUN: not grep movd %t
; RUN: grep {movss %xmm} %t | count 1
; RUN: grep {extractps \\\$1, %xmm0, } %t | count 1
; Make sure this testcase codegens to the fabs instruction, not a call to fabsf
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \
; RUN: count 2
; RUN: llvm-as < %s | \
; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {add ESP, 8}
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {mov EDX, 1}
; check that fastcc is passing stuff in regs.
-; RUN: llvm-as < %s | llc -march=x86 -O0
+; RUN: llc < %s -march=x86 -O0
; This file is for regression tests for cases where FastISel needs
; to gracefully bail out and let SelectionDAGISel take over.
-; RUN: llvm-as < %s | llc -O0 -march=x86-64 -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -O0 -march=x86-64 -mattr=+mmx | FileCheck %s
; PR4684
target datalayout =
-; RUN: llvm-as < %s | llc -fast-isel -march=x86 | grep and
+; RUN: llc < %s -fast-isel -march=x86 | grep and
define i32 @t() nounwind {
tak:
-; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)}
+; RUN: llc < %s -fast-isel | grep {LCPI1_0(%rip)}
; Make sure fast isel uses rip-relative addressing when required.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.0"
-; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86-64 | FileCheck %s
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86-64 | FileCheck %s
; CHECK: doo:
; CHECK: xor
-; RUN: llvm-as < %s | llc -march=x86-64 -O0 | grep movslq
-; RUN: llvm-as < %s | llc -march=x86 -O0
+; RUN: llc < %s -march=x86-64 -O0 | grep movslq
+; RUN: llc < %s -march=x86 -O0
; PR3181
; GEP indices are interpreted as signed integers, so they
-; RUN: llvm-as < %s | llc -fast-isel | grep {_kill@GOTPCREL(%rip)}
+; RUN: llc < %s -fast-isel | grep {_kill@GOTPCREL(%rip)}
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10.0"
@f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -fast-isel | grep {andb \$1, %}
+; RUN: llc < %s -march=x86 -fast-isel | grep {andb \$1, %}
declare i64 @bar(i64)
-; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin | \
+; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | \
; RUN: grep lazy_ptr, | count 2
-; RUN: llvm-as < %s | llc -fast-isel -march=x86 -relocation-model=static | \
+; RUN: llc < %s -fast-isel -march=x86 -relocation-model=static | \
; RUN: grep lea
@src = external global i32
-; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86
define i8 @t2(i8 %a, i8 %c) nounwind {
%tmp = shl i8 %a, %c
-; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {sarl \$80, %eax}
+; RUN: llc < %s -march=x86 -O0 | grep {sarl \$80, %eax}
; PR3242
define i32 @foo(i32 %x) nounwind {
-; RUN: llvm-as < %s | llc -fast-isel -tailcallopt -march=x86 | not grep add
+; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add
; PR4154
; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr
+; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr
; PR3654
@v = thread_local global i32 0
-; RUN: llvm-as < %s | llc -march=x86 -fast-isel -fast-isel-abort
-; RUN: llvm-as < %s | llc -march=x86-64 -fast-isel -fast-isel-abort
+; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort
+; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort
define i8 @t1(i32 %x) signext nounwind {
%tmp1 = trunc i32 %x to i8
-; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86 -mattr=sse2
+; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86 -mattr=sse2
; This tests very minimal fast-isel functionality.
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-mingw32 | \
+; RUN: llc < %s -mtriple=i386-unknown-mingw32 | \
; RUN: grep {@12}
; Check that a fastcall function gets correct mangling
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1
define i32 @foo() nounwind {
entry:
-; RUN: llvm-as < %s | llc -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2
+; RUN: llc < %s -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2
; PR3122
; rdar://6400815
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt=false | grep ret | not grep 4
+; RUN: llc < %s -march=x86 -tailcallopt=false | grep ret | not grep 4
%struct.foo = type { [4 x i32] }
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep ecx | grep 0
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep xmm0 | grep 8
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep ecx | grep 0
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep xmm0 | grep 8
@d = external global double ; <double*> [#uses=1]
@c = external global double ; <double*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep sar | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep sar
+; RUN: llc < %s -march=x86 | grep sar | count 1
+; RUN: llc < %s -march=x86-64 | not grep sar
define i32 @test(i32 %f12) {
%tmp7.25 = lshr i32 %f12, 16
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
define fastcc double @sint64_to_fp(i64 %X) {
%R = sitofp i64 %X to double ; <double> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 -enable-unsafe-fp-math | not grep mulps
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mulps
+; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps
+; RUN: llc < %s -march=x86-64 | grep mulps
define void @test14(<4 x float>*) nounwind {
load <4 x float>* %0, align 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)}
+; RUN: llc < %s -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)}
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.6"
-; RUN: llvm-as < %s | llc -march=x86 | not grep and
+; RUN: llc < %s -march=x86 | not grep and
define i32 @t1(i8* %X, i32 %i) {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 1
@f = external global void ()* ; <void ()**> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep call | grep 560
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep call | grep 560
; rdar://6522427
%"struct.clang::Action" = type { %"struct.clang::ActionBase" }
-; RUN: llvm-as < %s | llc -march=x86 | not grep mov
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
+; RUN: llc < %s -march=x86 | not grep mov
+; RUN: llc < %s -march=x86-64 | not grep mov
declare void @bar()
-; RUN: llvm-as < %s | llc -march=x86 | grep inc
-; RUN: llvm-as < %s | llc -march=x86 | grep add | grep 4
+; RUN: llc < %s -march=x86 | grep inc
+; RUN: llc < %s -march=x86 | grep add | grep 4
define i32 @test(i32 %X) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
%struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
%struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
@stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep lea
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
@B = external global [1000 x i8], align 32
@A = external global [1000 x i8], align 32
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI1_2 | count 2
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI1_2 | count 2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
; This testcase shouldn't need to spill the -1 value,
; so it should just use pcmpeqd to materialize an all-ones vector.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: grep pcmpeqd %t | count 1
; RUN: grep xor %t | count 1
; RUN: not grep LCP %t
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
; This testcase should need to spill the -1 value on x86-32,
; so it shouldn't use pcmpeqd to materialize an all-ones vector; it
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movslq | count 1
+; RUN: llc < %s -march=x86-64 | grep movslq | count 1
; PR4050
type { i64 } ; type %0
;; Test that this FP immediate is stored in the constant pool as a float.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3 | \
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | \
; RUN: grep {.long.1123418112}
define double @D() {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)}
+; RUN: llc < %s -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)}
; These operations should be done in integer registers, eliminating constant
; pool loads, movd's etc.
-; RUN: llvm-as < %s | llc -march=x86 | grep fldz
-; RUN: llvm-as < %s | llc -march=x86-64 | grep fld1
+; RUN: llc < %s -march=x86 | grep fldz
+; RUN: llc < %s -march=x86-64 | grep fld1
; This is basically this code on x86-64:
; _Complex long double test() { return 1.0; }
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | \
+; RUN: llc < %s -march=x86 -mcpu=i386 | \
; RUN: grep {fucomi.*st.\[12\]}
; PR1012
-; RUN: llvm-as < %s | llc -march=x86 | not grep fstp
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep movsd
+; RUN: llc < %s -march=x86 | not grep fstp
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movsd
declare double @foo()
-; RUN: llvm-as < %s | llc -mcpu=yonah | grep cvtss2sd
-; RUN: llvm-as < %s | llc -mcpu=yonah | grep fstps
-; RUN: llvm-as < %s | llc -mcpu=yonah | not grep cvtsd2ss
+; RUN: llc < %s -mcpu=yonah | grep cvtss2sd
+; RUN: llc < %s -mcpu=yonah | grep fstps
+; RUN: llc < %s -mcpu=yonah | not grep cvtsd2ss
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -mcpu=yonah | not grep movss
+; RUN: llc < %s -mcpu=yonah | not grep movss
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
; This should not copy the result of foo into an xmm register.
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
; rdar://5689903
declare double @foo()
-; RUN: llvm-as < %s | llc -march=x86 | grep fxch | count 2
+; RUN: llc < %s -march=x86 | grep fxch | count 2
define i32 @main() nounwind {
entry:
;; LowerFP_TO_SINT should not create a stack object if it's not needed.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep add
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep add
define i32 @main(i32 %argc, i8** %argv) {
cond_false.i.i.i: ; preds = %bb.i5
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
; RUN: grep {fadd\\|fsub\\|fdiv\\|fmul} | not grep -i ST
; Test that the load of the constant is folded into the operation.
-; RUN: llvm-as < %s | llc -march=x86 | grep fild | not grep ESP
+; RUN: llc < %s -march=x86 | grep fild | not grep ESP
define double @short(i16* %P) {
%V = load i16* %P ; <i16> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul}
; Test that the load of the memory location is folded into the operation.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \
; RUN: grep -v sp | grep xorps | count 2
; Don't fold the incoming stack arguments into the xorps instructions used
-; RUN: llvm-as < %s | llc -march=x86 -enable-full-lsr >%t
+; RUN: llc < %s -march=x86 -enable-full-lsr >%t
; RUN: grep {addl \\\$4,} %t | count 3
; RUN: not grep {,%} %t
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: not grep lea %t
; RUN: not grep add %t
; RUN: grep mov %t | count 1
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static > %t
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static > %t
; RUN: not grep lea %t
; RUN: not grep add %t
; RUN: grep mov %t | count 1
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
; PR4639
@G1 = internal thread_local global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
; int G1;
-; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl %\[abcd\]h,} | count 7
+; RUN: llc < %s -march=x86 | grep {movzbl %\[abcd\]h,} | count 7
; Use h-register extract and zero-extend.
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 7
+; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 7
; Use h-register extract and zero-extend.
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep mov %t | count 6
; RUN: grep {movb %ah, (%rsi)} %t | count 3
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep mov %t | count 3
; RUN: grep {movb %ah, (%e} %t | count 3
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 4
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 4
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {incb %ah} %t | count 3
; RUN: grep {movzbl %ah,} %t | count 3
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep {movzbl %\[abcd\]h,} %t | count 8
; RUN: grep {%\[abcd\]h} %t | not grep {%r\[\[:digit:\]\]*d}
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {movzbl %\[abcd\]h,} %t | count 1
; RUN: grep {shll \$3,} %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
define zeroext i8 @foo() nounwind ssp {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep mov | count 1
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 | not grep GOT
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep mov | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | not grep GOT
@x = weak hidden global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
@x = external hidden global i32 ; <i32*> [#uses=1]
@y = extern_weak hidden global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s
@x = common hidden global i32 0 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN
@a = hidden global i32 0
@b = external global i32
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep 18446744073709551615 | count 14
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep 18446744073709551615 | count 14
; These static initializers are too big to hand off to assemblers
; as monolithic blobs.
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 2
+; RUN: llc < %s -march=x86-64 | grep movq | count 2
define i128 @__addvti3() {
ret i128 -1
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR1198
define i64 @foo(i64 %x, i64 %y) {
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx}
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax}
+; RUN: llc < %s -march=x86-64 | grep {movq 8(%rdi), %rdx}
+; RUN: llc < %s -march=x86-64 | grep {movq (%rdi), %rax}
define i128 @test(i128 *%P) {
%A = load i128* %P
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep adcl %t | count 7
; RUN: grep sbbl %t | count 7
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind {
%a = load i2011* %x
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),}
+; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),}
; Uses movsd to load / store i64 values if sse2 is available.
-; RUN: llvm-as < %s | llc -march=x86-64 -stats |& \
+; RUN: llc < %s -march=x86-64 -stats |& \
; RUN: grep {6 .*Number of machine instrs printed}
;; Integer absolute value, should produce something at least as good as:
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -disable-fp-elim
-; RUN: llvm-as < %s | llc -mtriple=i386-linux -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-linux -disable-fp-elim
; XFAIL: *
; Expected to run out of registers during allocation.
; PR3864
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0}
define <4 x double> @foo(<4 x double> %x, <4 x double> %z) {
%y = fmul <4 x double> %x, %z
-; RUN: llvm-as < %s | llc -march=x86 | not grep mov
+; RUN: llc < %s -march=x86 | not grep mov
%struct.active_line = type { %struct.gs_fixed_point, %struct.gs_fixed_point, i32, i32, i32, %struct.line_segment*, i32, i16, i16, %struct.active_line*, %struct.active_line* }
%struct.gs_fixed_point = type { i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 3
-; RUN: llvm-as < %s | llc -march=x86-64 | grep shl | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep imul
+; RUN: llc < %s -march=x86-64 | grep lea | count 3
+; RUN: llc < %s -march=x86-64 | grep shl | count 1
+; RUN: llc < %s -march=x86-64 | not grep imul
define i64 @t1(i64 %a) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep lea
+; RUN: llc < %s -march=x86 | grep lea
declare i32 @foo()
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq
+; RUN: llc < %s -march=x86-64 | not grep movq
define i64 @t(i64 %a, i64 %b) nounwind ssp {
entry:
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define x86_fp80 @test1() {
%tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {fld %%st(0)} %t
; PR4185
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {fld %%st(0)} %t
; PR4459
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR4484
declare x86_fp80 @ceil()
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR4485
define void @test(x86_fp80* %a) {
-; RUN: llvm-as < %s | llc -march=x86 | grep { 37}
+; RUN: llc < %s -march=x86 | grep { 37}
; rdar://7008959
define void @bork() nounwind {
; PR2094
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movslq
-; RUN: llvm-as < %s | llc -march=x86-64 | grep addps
-; RUN: llvm-as < %s | llc -march=x86-64 | grep paddd
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq
+; RUN: llc < %s -march=x86-64 | grep movslq
+; RUN: llc < %s -march=x86-64 | grep addps
+; RUN: llc < %s -march=x86-64 | grep paddd
+; RUN: llc < %s -march=x86-64 | not grep movq
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
; PR3391
@pci_indirect = external global { } ; <{ }*> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic | grep lea
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic | grep call
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep lea
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep call
@main_q = internal global i8* null ; <i8**> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; rdar://7066579
type { i64, i64, i64, i64, i64 } ; type %0
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 12(%esp)} | count 2
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 12(%esp)} | count 2
; rdar://6992609
target triple = "i386-apple-darwin9.0"
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah
define void @test1() {
tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define i32 @test1() nounwind {
; Dest is AX, dest type = i32.
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3
+; RUN: llc < %s -march=x86 | grep mov | count 3
define fastcc i32 @sqlite3ExprResolveNames() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep movw
+; RUN: llc < %s -march=x86-64 | not grep movw
define i16 @test5(i16 %f12) nounwind {
%f11 = shl i16 %f12, 2 ; <i16> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 11
+; RUN: llc < %s -march=x86-64 | grep mov | count 11
%struct.COMPOSITE = type { i8, i16, i16 }
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
-; RUN: llvm-as < %s | llc -march=x86-64 | grep -v IMPLICIT_DEF
+; RUN: llc < %s -march=x86-64 | grep -v IMPLICIT_DEF
define void @foo(<2 x float>* %p) {
%t = insertelement <2 x float> undef, float 0.0, i32 0
-; RUN: llvm-as < %s | llc -march=x86 -disable-mmx
+; RUN: llc < %s -march=x86 -disable-mmx
; Test to check that we properly legalize an insert vector element
define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind {
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2098
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 | not grep lea
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin8 | \
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 | \
; RUN: grep {movl \$4, (.*,.*,4)}
define i32 @test(i32* %X, i32 %B) {
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep {movb.7(%...)} %t
; RUN: not grep leal %t
-; RUN: llvm-as < %s | llc | grep {addl.\$4, %ecx}
-; RUN: llvm-as < %s | llc | not grep leal
+; RUN: llc < %s | grep {addl.\$4, %ecx}
+; RUN: llc < %s | not grep leal
; this should not sink %1 into bb1, that would increase reg pressure.
; rdar://6399178
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: not grep cmp %t
; RUN: not grep xor %t
; RUN: grep jne %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 | not grep call
+; RUN: llc < %s -march=x86 | not grep call
declare i1 @llvm.isunordered.f64(double)
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep pxor
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep pxor
; This should not need to materialize 0.0 to evaluate the condition.
-; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
+; RUN: llc < %s -march=x86 | grep {shrl.*31}
define i32 @test1(i32 %X) {
entry:
-; RUN: llvm-as < %s | llc -march=x86-64 -o %t
+; RUN: llc < %s -march=x86-64 -o %t
; RUN: grep inc %t | count 1
; RUN: grep dec %t | count 2
; RUN: grep addq %t | count 13
-; RUN: llvm-as < %s | llc -march=x86 | grep jns
+; RUN: llc < %s -march=x86 | grep jns
define i32 @f(i32 %X) {
entry:
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; verify PR 1700 is still fixed
; ModuleID = 'hh.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]}
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: not grep add
define i32 @test1(i32 %A, i32 %B) {
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax}
+; RUN: llc < %s -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax}
define i32 @test(i32 %a) {
%tmp2 = mul i32 %a, 3 ; <i32> [#uses=1]
ret i32 %tmp2
}
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax}
+; RUN: llc < %s -march=x86-64 | grep {leaq (,%rdi,4), %rax}
define i64 @test2(i64 %a) {
%tmp2 = shl i64 %a, 2
%tmp3 = or i64 %tmp2, %a
-; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 2
+; RUN: llc < %s -march=x86-64 | grep lea | count 2
define zeroext i16 @t1(i32 %on_off) nounwind {
entry:
--- /dev/null
+; RUN: llc < %s -march=x86-64 > %t
+; RUN: grep negl %t | count 1
+; RUN: not grep {sub\[bwlq\]} %t
+; RUN: grep mov %t | count 1
+; RUN: grep {leal -4(} %t | count 1
+
+; ISel the add of -4 with a neg and use an lea for the rest of the
+; arithemtic.
+
+define i32 @test(i32 %x_offs) nounwind readnone {
+entry:
+ %t0 = icmp sgt i32 %x_offs, 4 ; <i1> [#uses=1]
+ br i1 %t0, label %bb.nph, label %bb2
+
+bb.nph: ; preds = %entry
+ %tmp = add i32 %x_offs, -5 ; <i32> [#uses=1]
+ %tmp6 = lshr i32 %tmp, 2 ; <i32> [#uses=1]
+ %tmp7 = mul i32 %tmp6, -4 ; <i32> [#uses=1]
+ %tmp8 = add i32 %tmp7, %x_offs ; <i32> [#uses=1]
+ %tmp9 = add i32 %tmp8, -4 ; <i32> [#uses=1]
+ ret i32 %tmp9
+
+bb2: ; preds = %entry
+ ret i32 %x_offs
+}
-; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 12
+; RUN: llc < %s -march=x86-64 | grep lea | count 12
; This testcase was written to demonstrate an instruction-selection problem,
; however it also happens to expose a limitation in the DAGCombiner's
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
define i32 @test1(i32 %x) nounwind {
%tmp1 = shl i32 %x, 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=sse2 -disable-mmx -o %t
; RUN: grep {call.*divdi3} %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep lfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep lfence
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
-; RUN: llvm-as < %s | llc -limit-float-precision=6 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=6 -march=x86 | \
; RUN: not grep exp | not grep log | not grep pow
-; RUN: llvm-as < %s | llc -limit-float-precision=12 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=12 -march=x86 | \
; RUN: not grep exp | not grep log | not grep pow
-; RUN: llvm-as < %s | llc -limit-float-precision=18 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=18 -march=x86 | \
; RUN: not grep exp | not grep log | not grep pow
define float @f1(float %x) nounwind noinline {
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {testb \[$\]1,}
+; RUN: llc < %s -march=x86-64 | grep {testb \[$\]1,}
; Make sure dagcombine doesn't eliminate the comparison due
; to an off-by-one bug with ComputeMaskedBits information.
-; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %edx}
+; RUN: llc < %s -march=x86 -regalloc=local | grep {subl %eax, %edx}
; Local regalloc shouldn't assume that both the uses of the
; sub instruction are kills, because one of them is tied
-; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep shr | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep xor | count 1
+; RUN: llc < %s -march=x86 | grep cmp | count 1
+; RUN: llc < %s -march=x86 | grep shr | count 1
+; RUN: llc < %s -march=x86 | grep xor | count 1
define i1 @t1(i64 %x) nounwind {
%B = icmp slt i64 %x, 0
-; RUN: llvm-as < %s | llc -march=x86 | not grep '4{(%...)}
+; RUN: llc < %s -march=x86 | not grep '4{(%...)}
; This should not load or store the top part of *P.
define void @test(i64* %P) nounwind {
; LSR should hoist the load from the "Arr" stub out of the loop.
-; RUN: llvm-as < %s | llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s
+; RUN: llc < %s -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s
; CHECK: _foo:
; CHECK: L_Arr$non_lazy_ptr
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic | \
+; RUN: llc < %s -march=x86 -relocation-model=pic | \
; RUN: grep {, 4} | count 1
-; RUN: llvm-as < %s | llc -march=x86 | not grep lea
+; RUN: llc < %s -march=x86 | not grep lea
;
; Make sure the common loop invariant A is hoisted up to preheader,
; since too many registers are needed to subsume it into the addressing modes.
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | \
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | \
; RUN: grep {A+} | count 2
;
; Make sure the common loop invariant A is not hoisted up to preheader,
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \
+; RUN: llc < %s -march=x86 -relocation-model=static | \
; RUN: grep {A+} | count 2
;
; Make sure the common loop invariant A is not hoisted up to preheader,
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov
+; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov
;
; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader.
-; RUN: llvm-as < %s | llc -march=x86 | grep cmp | grep 240
-; RUN: llvm-as < %s | llc -march=x86 | grep inc | count 1
+; RUN: llc < %s -march=x86 | grep cmp | grep 240
+; RUN: llc < %s -march=x86 | grep inc | count 1
define i32 @foo(i32 %A, i32 %B, i32 %C, i32 %D) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep cmp | grep 64
-; RUN: llvm-as < %s | llc -march=x86 | not grep inc
+; RUN: llc < %s -march=x86 | grep cmp | grep 64
+; RUN: llc < %s -march=x86 | not grep inc
@state = external global [0 x i32] ; <[0 x i32]*> [#uses=4]
@S = external global [0 x i32] ; <[0 x i32]*> [#uses=4]
-; RUN: llvm-as < %s | llc -march=x86 | grep inc | count 1
+; RUN: llc < %s -march=x86 | grep inc | count 1
@X = weak global i16 0 ; <i16*> [#uses=1]
@Y = weak global i16 0 ; <i16*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep inc
+; RUN: llc < %s -march=x86-64 | not grep inc
define fastcc i32 @decodeMP3(i32 %isize, i32* %done) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep imul
+; RUN: llc < %s -march=x86 | not grep imul
target triple = "i386-apple-darwin9.6"
%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep leal | not grep 16
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep leal | not grep 16
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32 }
%struct.bitmap_element = type { %struct.bitmap_element*, %struct.bitmap_element*, i32, [2 x i64] }
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: not grep neg %t
; RUN: not grep sub.*esp %t
; RUN: not grep esi %t
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep inc %t | count 1
; RUN: not grep incw %t
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep and %t
; RUN: not grep movz %t
; RUN: not grep sar %t
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep and %t | count 6
; RUN: grep movzb %t | count 6
; RUN: grep sar %t | count 12
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep -i EDI
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep -i RDI
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -i EDI
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI
; rdar://6573467
define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 5
+; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
+; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 5
%struct.ParmT = type { [25 x i8], i8, i8* }
@.str12 = internal constant [25 x i8] c"image\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[25 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep call.*memcpy | count 2
+; RUN: llc < %s -march=x86-64 | grep call.*memcpy | count 2
declare void @llvm.memcpy.i64(i8*, i8*, i64, i32)
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy}
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | not grep call
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | not grep call
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
+; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove}
declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a)
-; RUN: llvm-as < %s | llc | not grep call
+; RUN: llc < %s | not grep call
target triple = "i686-pc-linux-gnu"
-; RUN: llvm-as < %s | llc | not grep rep
-; RUN: llvm-as < %s | llc | grep memset
+; RUN: llc < %s | not grep rep
+; RUN: llc < %s | grep memset
target triple = "i386"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 9
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 3
+; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 9
+; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 3
%struct.x = type { i16, i16 }
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep stosl
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq | count 10
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep stosl
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq | count 10
define void @bork() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep sfence
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep lfence
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep sfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mfence
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
-; RUN: llvm-as < %s | llc -o %t
+; RUN: llc < %s -o %t
; RUN: grep __alloca %t | count 2
; RUN: grep -- -16 %t
; RUN: grep {pushl %eax} %t
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups
;
; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
; On Darwin x86-32, v1i64 values are passed in memory.
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2
@g_v8qi = external global <8 x i8>
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx
+; RUN: llc < %s -march=x86 -mattr=+mmx
;; A basic sanity check to make sure that MMX arithmetic actually compiles.
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4
+; RUN: llc < %s -march=x86-64 | grep movd | count 4
define i64 @foo(<1 x i64>* %p) {
%t = load <1 x i64>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movsd.(%eax),}
+; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax}
+; RUN: llc < %s -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.(%eax),}
; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
; increases the places that need to use emms.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep emms
define void @foo() {
entry:
call void @llvm.x86.mmx.emms( )
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | not grep movq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psllq
+; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movq
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq
define <2 x i32> @qux(i32 %A) nounwind {
%tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep pinsrw | count 1
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep pinsrw | count 1
; PR2562
external global i16 ; <i16*>:0 [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | count 1
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1
define void @bork(<1 x i64>* %x) {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx
+; RUN: llc < %s -march=x86 -mattr=+mmx
; PR2574
define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) {; <label>:0
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psllq | grep 32
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psllq | grep 32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psrad
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psrlw
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq | grep 32
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psllq | grep 32
+; RUN: llc < %s -march=x86 -mattr=+mmx | grep psrad
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psrlw
define i64 @t1(<1 x i64> %mm1) nounwind {
entry:
-; RUN: llvm-as < %s | llc -mcpu=yonah
+; RUN: llc < %s -mcpu=yonah
; PR1427
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep pxor
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep punpckldq
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq
%struct.vS1024 = type { [8 x <4 x i32>] }
%struct.vS512 = type { [4 x <4 x i32>] }
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movd
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movq
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movd
+; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq
define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep fs
+; RUN: llc < %s -march=x86 | grep fs
define i32 @foo() nounwind readonly {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep gs
+; RUN: llc < %s -march=x86 | grep gs
define i32 @foo() nounwind readonly {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep 24576
+; RUN: llc < %s -march=x86 | grep 24576
; PR2135
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86 | grep mov | count 1
; PR1874
define i32 @test(i32 %a, i32 %b) {
-; RUN: llvm-as < %s | llc -march=x86 | grep lea
-; RUN: llvm-as < %s | llc -march=x86 | not grep add
+; RUN: llc < %s -march=x86 | grep lea
+; RUN: llc < %s -march=x86 | not grep add
define i32 @test(i32 %X, i32 %Y) {
; Push the shl through the mul to allow an LEA to be formed, instead
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mul | count 3
+; RUN: llc < %s -march=x86-64 | grep mul | count 3
define i128 @foo(i128 %t, i128 %u) {
%k = mul i128 %t, %u
-; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 3
+; RUN: llc < %s -march=x86 | grep mul | count 3
define i64 @foo(i64 %t, i64 %u) {
%k = mul i64 %t, %u
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
declare {x86_fp80, x86_fp80} @test()
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
define {i64, float} @bar(i64 %a, float %b) {
%y = add i64 %a, 7
-; RUN: llvm-as < %s | llc -march=x86-64 | grep orb | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep orb | grep 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep orl | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep orl | grep 16842752
+; RUN: llc < %s -march=x86-64 | grep orb | count 1
+; RUN: llc < %s -march=x86-64 | grep orb | grep 1
+; RUN: llc < %s -march=x86-64 | grep orl | count 1
+; RUN: llc < %s -march=x86-64 | grep orl | grep 16842752
%struct.bf = type { i64, i16, i16, i32 }
@bfi = common global %struct.bf zeroinitializer, align 16
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
%struct.bf = type { i64, i16, i16, i32 }
@bfi = external global %struct.bf*
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
; RUN: grep xorps %t | count 1
; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization
-; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86 | not grep xor
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | not grep xor
; PR3374
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86-64 | \
+; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | \
; RUN: not egrep {addsd|subsd|xor}
declare double @sin(double %f)
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; rdar://6559995
@a = external global [255 x i8*], align 32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3 | grep fchs
+; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs
define double @T() {
-; RUN: llvm-as < %s | llc -march=x86 | not grep btl
+; RUN: llc < %s -march=x86 | not grep btl
; This tests some cases where BT must not be generated. See also bt.ll.
; Fixes 20040709-[12].c in gcc testsuite.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep fence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep fence
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
-; RUN: llvm-as < %s | llc -asm-verbose=false -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-linux-gnu | FileCheck %s
; PR4126
; PR4732
-; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1
+; RUN: llc < %s -march=x86 | grep movw | count 1
define i16 @t() signext {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep cmov
+; RUN: llc < %s -march=x86 | not grep cmov
; LSR should be able to eliminate the max computations by
; making the loops use slt/ult comparisons instead of ne comparisons.
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep cmov
+; RUN: llc < %s -march=x86-64 | not grep cmov
; LSR should be able to eliminate both smax and umax expressions
; in loop trip counts.
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep cmov %t | count 2
; RUN: grep jne %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 | not grep set
+; RUN: llc < %s -march=x86 | not grep set
define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
entry:
; Check that the shift gets turned into an LEA.
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: not grep {mov E.X, E.X}
@G = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep foos+5 %t
; RUN: grep foos+1 %t
; RUN: grep foos+9 %t
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep cmp %t
; RUN: not grep test %t
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep dec %t | count 1
; RUN: not grep test %t
; RUN: not grep cmp %t
-; RUN: llvm-as < %s | llc -march=x86 | grep testl
+; RUN: llc < %s -march=x86 | grep testl
; It's tempting to eliminate the testl instruction here and just use the
; EFLAGS value from the incl, however it can't be known whether the add
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0}
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0}
define float @foo(<8 x float> %a) nounwind {
%c = extractelement <8 x float> %a, i32 3
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2
+; RUN: llc < %s -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2
define float @foo(<4 x float> %a) {
%b = insertelement <4 x float> %a, float 0.0, i32 3
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 5
+; RUN: llc < %s -march=x86 | grep mov | count 5
; PR2659
define i32 @binomial(i32 %n, i32 %k) nounwind {
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl
%struct.dpoint = type { double, double }
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic \
; RUN: -o %t
; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
; RUN: grep piclabel %t | count 3
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic \
; RUN: -o %t
; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
; RUN: grep piclabel %t | count 3
; RUN: grep JTI %t | count 2
; X86-64:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux-gnu -relocation-model=pic > %t
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=pic > %t
; RUN: grep {LJTI1_0(%rip)} %t
define void @bar(i32 %n.u) nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb
define void @f() nounwind {
entry:
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
-; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep 'lJTI'
+; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
; rdar://6971437
declare void @_Z3bari(i32)
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -stack-alignment=16 > %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -stack-alignment=16 > %t
; RUN: grep pmul %t | count 12
; RUN: grep mov %t | count 12
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3
+; RUN: llc < %s -march=x86 | grep mov | count 3
define fastcc i32 @_Z18yy_get_next_bufferv() {
entry:
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR1462
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-
-; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3
-; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1
+; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3
+; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1
;; magic constants are 3.999f and half of 3.999
; ModuleID = '1489.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc -mcpu=i486 | not grep fldl
+; RUN: llc < %s -mcpu=i486 | not grep fldl
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | count 4
-; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | count 3
+; RUN: llc < %s -mcpu=i486 | grep fstpl | count 4
+; RUN: llc < %s -mcpu=i486 | grep fstps | count 3
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2177
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-; RUN: llvm-as < %s | llc | grep {addl \$3, (%eax)} | count 4
+; RUN: llc < %s | grep {addl \$3, (%eax)} | count 4
; PR2182
target datalayout =
-; RUN: llvm-as < %s | llc -march=x86 | grep sete
+; RUN: llc < %s -march=x86 | grep sete
; PR2326
define i32 @func_59(i32 %p_60) nounwind {
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2623
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {xorps.\*sp} | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {xorps.\*sp} | count 1
; PR2656
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5
; PR2659
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2849
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR2924
target datalayout =
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR2982
target datalayout =
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mattr=+sse2
-; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2
+; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim
; PR3154
define void @ff_flac_compute_autocorr_sse2(i32* %data, i32 %len, i32 %lag, double* %autoc) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 | grep {sar. \$5}
+; RUN: llc < %s -march=x86 | grep {sar. \$5}
@foo = global i8 127
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3241
@g_620 = external global i32
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3243
declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3244
@g_62 = external global i16 ; <i16*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3250
declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
; PR3317
%ArraySInt16 = type { %JavaObject, i8*, [0 x i16] }
-; RUN: llvm-as < %s | llc -march=x86 | grep movzbl
+; RUN: llc < %s -march=x86 | grep movzbl
; PR3366
define void @_ada_c34002a() nounwind {
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep fstpt
+; RUN: llc < %s -mtriple=i386-apple-darwin | not grep fstpt
; PR3457
; rdar://6548010
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of reloads omited}
+; RUN: llc < %s -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of reloads omited}
target triple = "i386-apple-darwin9.6"
%struct.constraintVCGType = type { i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of reloads omited} | grep 1
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of available reloads turned into copies} | grep 1
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of machine instrs printed} | grep 40
+; RUN: llc < %s -march=x86 -stats |& grep {Number of reloads omited} | grep 1
+; RUN: llc < %s -march=x86 -stats |& grep {Number of available reloads turned into copies} | grep 1
+; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 40
; PR3495
; The loop reversal kicks in once here, resulting in one fewer instruction.
-; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep machine-sink
+; RUN: llc < %s -march=x86 -stats |& not grep machine-sink
; PR3522
target triple = "i386-pc-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
; XFAIL: *
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
define i32 @main(i32 %argc, i8** %argv) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | count 2
define i32 @t(i32 %arg) {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
define i32 @t(i32 %arg) {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
define i32 @main(i32 %argc, i8** %argv) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
target triple = "i386-apple-darwin9.5"
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split | grep {divsd 8} | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split | grep {divsd 8} | count 1
@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split
@object_distance = external global double, align 8 ; <double*> [#uses=1]
@axis_slope_angle = external global double, align 8 ; <double*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse > %t
+; RUN: llc < %s -march=x86 -mattr=+sse > %t
; RUN: grep prefetchnta %t
; RUN: grep prefetcht0 %t
; RUN: grep prefetcht1 %t
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 | grep L__ZZ20
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20
; Quote should be outside of private prefix.
; rdar://6855766x
; Test to make sure that the 'private' is used correctly.
;
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep .Lfoo:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep call.*\.Lfoo
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep .Lbaz:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lfoo:
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep call.*\.Lfoo
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lbaz:
+; RUN: llc < %s -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz
declare void @foo()
-; RUN: llvm-as < %s | llc -mtriple=i386-linux | FileCheck %s
+; RUN: llc < %s -mtriple=i386-linux | FileCheck %s
%union.x = type { i64 }
; CHECK: .globl r
-; RUN: llvm-as < %s | llc -march=x86 | grep rdtsc
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rdtsc
+; RUN: llc < %s -march=x86 | grep rdtsc
+; RUN: llc < %s -march=x86-64 | grep rdtsc
declare i64 @llvm.readcyclecounter()
define i64 @foo() {
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
; First without noredzone.
; CHECK: f0:
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep subq %t | count 1
; RUN: grep addq %t | count 1
;; Both functions in this testcase should codegen to the same function, and
;; neither of them should require spilling anything to the stack.
-; RUN: llvm-as < %s | llc -march=x86 -stats |& \
+; RUN: llc < %s -march=x86 -stats |& \
; RUN: not grep {Number of register spills}
;; This can be compiled to use three registers if the loads are not
-; RUN: llvm-as < %s | llc -march=x86 | not grep cltd
+; RUN: llc < %s -march=x86 | not grep cltd
define i32 @test(i32 %X) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep div
+; RUN: llc < %s -march=x86 | not grep div
define i32 @test1(i32 %X) {
%tmp1 = srem i32 %X, 255 ; <i32> [#uses=1]
-; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static | grep xmm | count 2
+; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static | grep xmm | count 2
declare void @bar() nounwind
-; RUN: llvm-as < %s | llc -march=x86 | grep -- -1 | grep mov | count 2
+; RUN: llc < %s -march=x86 | grep -- -1 | grep mov | count 2
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.ImgT = type { i8, i8*, i8*, %struct.FILE*, i32, i32, i32, i32, i8*, double*, float*, float*, float*, i32*, double, double, i32*, double*, i32*, i32* }
-; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86 | not grep xor
-; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86-64 | not grep xor
+; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor
+; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor
define i8* @h() nounwind readnone optsize {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep xor | count 2
+; RUN: llc < %s -march=x86 | grep xor | count 2
define i64 @foo() nounwind {
ret i64 0
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx,+sse2
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2
; rdar://6602459
@g_v1di = external global <1 x i64>
-; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
-; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
+; RUN: llc < %s -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
; Use %rip-relative addressing even in static mode on x86-64, because
; it has a smaller encoding.
-; RUN: llvm-as < %s | llc -relocation-model=static | grep rodata | count 3
-; RUN: llvm-as < %s | llc -relocation-model=static | grep -F "rodata.cst" | count 2
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep rodata | count 2
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro" | count 2
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel" | count 4
-; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.local" | count 1
+; RUN: llc < %s -relocation-model=static | grep rodata | count 3
+; RUN: llc < %s -relocation-model=static | grep -F "rodata.cst" | count 2
+; RUN: llc < %s -relocation-model=pic | grep rodata | count 2
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro" | count 2
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel" | count 4
+; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.local" | count 1
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep rol %t | count 3
; RUN: grep ror %t | count 1
; RUN: grep shld %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep rol %t | count 3
; RUN: grep ror %t | count 1
; RUN: grep shld %t | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep rol %t | count 3
; RUN: grep ror %t | count 1
; RUN: grep shld %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {ro\[rl\]} | count 12
define i32 @rotl32(i32 %A, i8 %Amt) {
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rol | count 2
+; RUN: llc < %s -march=x86-64 | grep rol | count 2
define i64 @test1(i64 %x) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+mmx -o %t
; RUN: not grep movq %t
; Check that widening doesn't introduce a mmx register in this case when
-; RUN: llvm-as < %s | llc -march=x86-64 | grep min | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep max | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2
+; RUN: llc < %s -march=x86-64 | grep min | count 1
+; RUN: llc < %s -march=x86-64 | grep max | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
declare float @bar()
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 | \
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \
; RUN: grep mins | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 | \
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \
; RUN: grep maxs | count 2
declare i1 @llvm.isunordered.f64(double, double)
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
; PR3886
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
%"struct.DataOutBase::GmvFlags" = type { i32 }
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: not grep movz %t
; RUN: not grep cmov %t
; RUN: grep movb %t | count 2
-; RUN: llvm-as < %s | llc | not grep cmov
+; RUN: llc < %s | not grep cmov
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep cmov
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movzbl | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep cmov
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movzbl | count 1
@r1 = weak global i32 0
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep set
+; RUN: llc < %s -march=x86 -mcpu=pentium
+; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep set
define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind {
%X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep set | count 2
-; RUN: llvm-as < %s | llc -march=x86 | grep and
+; RUN: llc < %s -march=x86 | grep set | count 2
+; RUN: llc < %s -march=x86 | grep and
define zeroext i8 @t(double %x) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep set
+; RUN: llc < %s -march=x86 | not grep set
declare i1 @llvm.isunordered.f32(float, float)
-; RUN: llvm-as < %s | llc -march=x86 | grep movsbl
+; RUN: llc < %s -march=x86 | grep movsbl
define i32 @foo(i32 %X) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep movzbl | count 1
+; RUN: llc < %s -march=x86 | grep movzbl | count 1
; rdar://6699246
define signext i8 @t1(i8* %A) nounwind readnone ssp {
-; RUN: llvm-as < %s | llc -march=x86 | grep movsw
+; RUN: llc < %s -march=x86 | grep movsw
; PR2139
declare void @abort()
-; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: llc < %s -march=x86 > %t
; RUN: grep movsbl %t
; RUN: not grep movz %t
; RUN: not grep and %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep sfence
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep sfence
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
-; RUN: llvm-as < %s | llc -march=x86 | grep and | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep and
+; RUN: llc < %s -march=x86 | grep and | count 1
+; RUN: llc < %s -march=x86-64 | not grep and
define i32 @t1(i32 %t, i32 %val) nounwind {
%shamt = and i32 %t, 31
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {shld.*CL}
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: not grep {mov CL, BL}
; PR687
-; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \
+; RUN: llc < %s -relocation-model=static -march=x86 | \
; RUN: grep {shll \$3} | count 2
; This should produce two shll instructions, not any lea's.
-; RUN: llvm-as < %s | llc | not grep shrl
+; RUN: llc < %s | not grep shrl
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {sh\[lr\]d} | count 5
define i64 @test1(i64 %X, i8 %C) {
-; RUN: llvm-as < %s | llc -march=x86 | \
+; RUN: llc < %s -march=x86 | \
; RUN: grep {s\[ah\]\[rl\]l} | count 1
define i32* @test1(i32* %P, i32 %X) {
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
define void @t(i128 %x, i128 %a, i128* nocapture %r) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | not grep leal
+; RUN: llc < %s -march=x86 | not grep leal
@x = external global i32 ; <i32*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep shrdq
+; RUN: llc < %s -march=x86-64 | grep shrdq
; PR4736
%0 = type { i32, i8, [35 x i8] }
-; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax}
-; RUN: llvm-as < %s | llc -march=x86 | grep {shrl .eax}
-; RUN: llvm-as < %s | llc -march=x86 | grep {movswl .ax, .eax}
+; RUN: llc < %s -march=x86 | grep {movl 8(.esp), %eax}
+; RUN: llc < %s -march=x86 | grep {shrl .eax}
+; RUN: llc < %s -march=x86 | grep {movswl .ax, .eax}
define i32 @test1(i64 %a) {
%tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | not grep cvtss2sd
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd
; PR1264
define double @foo(double %x) {
-; RUN: llvm-as < %s | llc -march=x86 | grep flds
+; RUN: llc < %s -march=x86 | grep flds
; This should be a flds, not fldt.
define x86_fp80 @test2() nounwind {
entry:
-; RUN: llvm-as < %s | llc | not grep movs
+; RUN: llc < %s | not grep movs
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep add | count 3
+; RUN: llc < %s -march=x86 | grep mul | count 1
+; RUN: llc < %s -march=x86 | grep add | count 3
define i32 @t1(i32 %a, i32 %b) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep {jno} | count 1
+; RUN: llc < %s -march=x86 | grep {jno} | count 1
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
+; RUN: llc < %s -march=x86 | grep {jo} | count 1
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -soft-float | not grep xmm
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm
+; RUN: llc < %s -march=x86 -mattr=+sse2 -soft-float | not grep xmm
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep jmp
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep jmp
; rdar://6647639
%struct.FetchPlanHeader = type { i8*, i8*, i32, i8*, i8*, i8*, i8*, i8*, %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...)*, %struct.__attributeDescriptionFlags }
-; RUN: llvm-as < %s | llc -march=x86-64 | grep test | count 1
+; RUN: llc < %s -march=x86-64 | grep test | count 1
define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) {
%x = select i1 %c, <2 x i16> %a, <2 x i16> %b
-; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 16
-; RUN: llvm-as < %s | llc -march=x86-64 | grep fmodf | count 8
+; RUN: llc < %s -march=x86-64 | grep div | count 16
+; RUN: llc < %s -march=x86-64 | grep fmodf | count 8
define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) {
%m = srem <8 x i32> %t, %u
-; RUN: llvm-as < %s | llc -march=x86 | grep ret | grep 4
+; RUN: llc < %s -march=x86 | grep ret | grep 4
%struct.foo = type { [4 x i32] }
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov
+; RUN: llc < %s -march=x86-64 | not grep mov
define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
%t = load <4 x float>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2
+; RUN: llc < %s -march=x86-64 | grep movap | count 2
define <4 x float> @foo(<4 x float>* %p) nounwind {
%t = load <4 x float>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
define <2 x i64> @bar(<2 x i64>* %p) nounwind {
%t = load <2 x i64>* %p, align 8
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=linux | grep movups
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
+; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=linux | grep movups
define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep unpck %t | count 2
; RUN: grep shuf %t | count 2
; RUN: grep ps %t | count 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
%t = load <4 x float>* %p, align 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2
+; RUN: llc < %s -march=x86-64 | grep movap | count 2
define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
store <4 x float> %x, <4 x float>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
store <4 x float> %x, <4 x float>* %p, align 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1
+; RUN: llc < %s -march=x86-64 | grep movaps | count 1
define <2 x i64> @bar(<2 x i64>* %p) nounwind {
%t = load <2 x i64>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
%t = load <2 x i64>* %p, align 8
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1
+; RUN: llc < %s -march=x86-64 | grep movaps | count 1
define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
store <2 x i64> %x, <2 x i64>* %p
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1
+; RUN: llc < %s -march=x86-64 | grep movups | count 1
define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
store <2 x i64> %x, <2 x i64>* %p, align 8
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2
+; RUN: llc < %s -march=x86-64 | grep movup | count 2
define <4 x float> @foo(<4 x float>* %p) nounwind {
%t = load <4 x float>* %p, align 4
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep test
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep test
define float @tst1(float %a, float %b) {
%tmp = tail call float @copysignf( float %b, float %a )
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
; CHECK: clampTo3k_a:
; CHECK: minsd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xmm | grep esp
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xmm | grep esp
define i32 @t() nounwind {
entry:
; Tests for SSE2 and below, without SSE3+.
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 -mcpu=pentium4 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 | FileCheck %s
define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
%tmp3 = load <2 x double>* %A, align 16
; These are tests for SSE3 codegen. Yonah has SSE3 and earlier but not SSSE3+.
-; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=yonah -mtriple=i686-apple-darwin9\
+; RUN: llc < %s -march=x86-64 -mcpu=yonah -mtriple=i686-apple-darwin9\
; RUN: | FileCheck %s --check-prefix=X64
; Test for v8xi16 lowering where we extract the first element of the vector and
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64
@g16 = external global i16
-; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind
declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind
-; RUN: llvm-as < %s | llc -relocation-model=static -mcpu=yonah | grep {andpd.*4(%esp), %xmm}
+; RUN: llc < %s -relocation-model=static -mcpu=yonah | grep {andpd.*4(%esp), %xmm}
; The double argument is at 4(esp) which is 16-byte aligned, allowing us to
; fold the load into the andpd.
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs | grep {movl\[\[:space:\]\]%eax, %ebx}
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs | grep {movl\[\[:space:\]\]%eax, %ebx}
%"struct..0$_67" = type { i32, %"struct.llvm::MachineOperand"**, %"struct.llvm::MachineOperand"* }
%"struct..1$_69" = type { i32 }
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
; RUN: grep stackcoloring %t | grep "loads eliminated"
; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5
; RUN: grep asm-printer %t | grep 181
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {testb \[%\]al, \[%\]al}
+; RUN: llc < %s -march=x86-64 | grep {testb \[%\]al, \[%\]al}
%struct.__va_list_tag = type { i32, i32, i8*, i8* }
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 | FileCheck %s
; Don't crash on an empty struct member.
-; RUN: llvm-as < %s | llc -march=x86 | not grep rodata
-; RUN: llvm-as < %s | llc -march=x86 | not grep literal
+; RUN: llc < %s -march=x86 | not grep rodata
+; RUN: llc < %s -march=x86 | not grep literal
;
; Check that no FP constants in this testcase ends up in the
; constant pool.
-; RUN: llvm-as < %s | llc -march=x86 | grep movl | count 1
+; RUN: llc < %s -march=x86 | grep movl | count 1
@dst = global i32 0 ; <i32*> [#uses=1]
@ptr = global i32* null ; <i32**> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | not grep mov
+; RUN: llc < %s -march=x86 | not grep mov
;
; Test the add and load are folded into the store instruction.
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
; RUN: grep {and DWORD PTR} | count 2
target datalayout = "e-p:32:32"
-; RUN: llvm-as < %s | llc -march=x86 | not grep flds
+; RUN: llc < %s -march=x86 | not grep flds
define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) {
%c = fadd x86_fp80 %a, %b
-; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | not grep lea
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea
+; RUN: llc < %s -march=x86 -relocation-model=static | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
; P should be sunk into the loop and folded into the address mode. There
; shouldn't be any lea instructions inside the loop.
-; RUN: llvm-as < %s | llc -march=x86 | not grep lea
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea
+; RUN: llc < %s -march=x86 | not grep lea
+; RUN: llc < %s -march=x86-64 | not grep lea
@B = external global [1000 x float], align 32
@A = external global [1000 x float], align 32
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep {jb} | count 1
+; RUN: llc < %s -march=x86 | grep {jo} | count 1
+; RUN: llc < %s -march=x86 | grep {jb} | count 1
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
; Do eliminate the zero-extension instruction and rely on
; x86-64's implicit zero-extension!
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal .*), %e.\*} | count 1
+; RUN: llc < %s -march=x86-64 | grep {leal .*), %e.\*} | count 1
; Don't eliminate or coalesce away the explicit zero-extension!
; This is currently using an leal because of a 3-addressification detail,
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl
; rdar://6707985
%XXOO = type { %"struct.XXC::XXCC", i8*, %"struct.XXC::XXOO::$_71" }
-; RUN: llvm-as < %s | llc -march=x86-64 | grep imull
+; RUN: llc < %s -march=x86-64 | grep imull
; Don't eliminate or coalesce away the explicit zero-extension!
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep leaq %t
; RUN: not grep incq %t
; RUN: not grep decq %t
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86-64 > %t
; RUN: grep addl %t
; RUN: not egrep {movl|movq} %t
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
define i64 @foo() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86 | grep mov | count 1
; Do zextload, instead of a load and a separate zext.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movlps
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movups
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movlps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movups
; rdar://6523650
%struct.vector4_t = type { <4 x float> }
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
define fastcc i1 @i1test(i32, i32, i32, i32) {
entry:
%4 = tail call fastcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
-; RUN: llvm-as < %s | llc -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12
+; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12
; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
; is enabled, ensure that a normal fastcc call has matching stack size
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
define fastcc { { i8*, i8* }*, i8*} @init({ { i8*, i8* }*, i8*}, i32) {
entry:
%2 = tail call fastcc { { i8*, i8* }*, i8* } @init({ { i8*, i8*}*, i8*} %0, i32 %1)
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
define fastcc void @i1test(i32, i32, i32, i32) {
entry:
tail call fastcc void @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
entry:
ret i32 %a3
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1
+; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep TAILCALL
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL
; Expect 2 rep;movs because of tail call byval lowering.
-; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2
; A sequence of copyto/copyfrom virtual registers is used to deal with byval
; lowering appearing after moving arguments to registers. The following two
; checks verify that the register allocator changes those sequences to direct
; moves to argument register where it can (for registers that are not used in
; byval lowering - not rsi, not rdi, not rcx).
; Expect argument 4 to be moved directly to register edx.
-; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx
; Expect argument 6 to be moved directly to register r8.
-; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8
%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64,
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -tailcallopt | not grep call
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -tailcallopt | not grep call
define fastcc i32 @bar(i32 %X, i32(double, i32) *%FP) {
%Y = tail call fastcc i32 %FP(double 0.0, i32 %X)
ret i32 %Y
-; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax}
+; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax}
declare i32 @putchar(i32)
-; RUN: llvm-as < %s | llc -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep TAILCALL
+; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep TAILCALL
define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
entry:
-; RUN: llvm-as < %s | llc -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep -v TAILCALL
+; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep -v TAILCALL
define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
entry:
-; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | FileCheck %s
+; RUN: llc < %s -tailcallopt -march=x86-64 | FileCheck %s
; Check that lowered arguments on the stack do not overwrite each other.
; Add %in1 %p1 to a different temporary register (%eax).
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x}
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x}
; rdar://5752025
; We don't want to fold the and into the test, because the and clobbers its
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
; CHECK-64: g64xh:
; CHECK-64: testb $8, %ah
-; RUN: llvm-as < %s | llc | grep {testl.*\(%r.i\), %} | count 3
+; RUN: llc < %s | grep {testl.*\(%r.i\), %} | count 3
; rdar://5671654
; The loads should fold into the testl instructions, no matter how
; the inputs are commuted.
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
@i = thread_local global i32 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
@i = thread_local global i32 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2
; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movw %gs:i@NTPOFF, %ax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movw %fs:i@TPOFF, %ax} %t2
@i = thread_local global i16 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movb %gs:i@NTPOFF, %al} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movb %fs:i@TPOFF, %al} %t2
@i = thread_local global i8 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movswl %gs:i@NTPOFF, %eax} %t
; RUN: grep {movzwl %gs:j@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movswl %fs:i@TPOFF, %edi} %t2
; RUN: grep {movzwl %fs:j@TPOFF, %edi} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movsbl %gs:i@NTPOFF, %eax} %t
; RUN: grep {movzbl %gs:j@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movsbl %fs:i@TPOFF, %edi} %t2
; RUN: grep {movzbl %fs:j@TPOFF, %edi} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t | count 1
; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t
; RUN: grep {leal j@NTPOFF(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2 | count 1
; RUN: grep {leaq i@TPOFF(%rax), %rcx} %t2
; RUN: grep {leaq j@TPOFF(%rax), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2
; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl i@INDNTPOFF, %eax} %t
; RUN: grep {movl %gs:(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq i@GOTTPOFF(%rip), %rax} %t2
; RUN: grep {movl %fs:(%rax), %eax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {addl i@INDNTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2
; RUN: grep {addq i@GOTTPOFF(%rip), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
@i = internal thread_local global i32 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2
; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
@i = hidden thread_local global i32 15
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movq %fs:0, %rax} %t2
; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:i@NTPOFF, %eax} %t
-; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
; RUN: grep {movl %fs:i@TPOFF, %eax} %t2
@i = external hidden thread_local global i32
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep ud2
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep ud2
define i32 @test() noreturn nounwind {
entry:
tail call void @llvm.trap( )
; An integer truncation to i1 should be done with an and instruction to make
; sure only the LSBit survives. Test that this is the case both for a returned
; value and as the operand of a branch.
-; RUN: llvm-as < %s | llc -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \
+; RUN: llc < %s -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \
; RUN: count 5
define i1 @test1(i32 %X) zeroext {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \
; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted}
; rdar://6480363
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 5
+; RUN: llc < %s -march=x86 | grep mov | count 5
; rdar://6523745
@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted}
+; RUN: llc < %s -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted}
%struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
%struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& grep {Number of 3-address instructions sunk}
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& grep {Number of 3-address instructions sunk}
define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep 59796 | count 3
+; RUN: llc < %s -march=x86 | grep 59796 | count 3
%Args = type %Value*
%Exec = type opaque*
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1
; rdar://6504833
define float @f(i32 %x) nounwind readnone {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep {sub.*esp}
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep cvtsi2ss
+; RUN: llc < %s -march=x86 -mcpu=yonah | not grep {sub.*esp}
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep cvtsi2ss
; rdar://6034396
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
+; RUN: llc < %s -march=x86 | grep {jc} | count 1
; XFAIL: *
; FIXME: umul-with-overflow not supported yet.
-; RUN: llvm-as < %s | llc -march=x86 | grep "\\\\\\\<mul"
+; RUN: llc < %s -march=x86 | grep "\\\\\\\<mul"
declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
define i1 @a(i32 %x) zeroext nounwind {
-; RUN: llvm-as < %s | llc -march=x86 | grep 111
+; RUN: llc < %s -march=x86 | grep 111
define i8 @foo(i8 %tmp325) {
%t546 = urem i8 %tmp325, 37
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse | grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps
define <4 x float> @foo() {
ret <4 x float> <float 0x4009C9D0A0000000, float 0x4002666660000000, float 0x3FF3333340000000, float 0x3FB99999A0000000>
-; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero
+; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero
declare void @llvm.memset.i64(i8*, i8, i64, i32)
-; RUN: llvm-as < %s | llc -relocation-model=pic -code-model=large
+; RUN: llc < %s -relocation-model=pic -code-model=large
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) {
entry:
-; RUN: llvm-as < %s | llc -mcpu=yonah -relocation-model=static | grep movaps | count 2
+; RUN: llc < %s -mcpu=yonah -relocation-model=static | grep movaps | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
; RUN: grep {subl.*60}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
; RUN: grep {movaps.*32}
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
; RUN: not grep and %t
; RUN: not grep psrldq %t
; RUN: grep xorps %t
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
; RUN: grep extractps %t | count 1
; RUN: grep pextrd %t | count 1
; RUN: not grep pshufd %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 -o %t
; RUN: grep movss %t | count 3
; RUN: grep movhlps %t | count 1
; RUN: grep pshufd %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define <4 x float> @t1(<4 x float> %Q) {
%tmp15 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movq %t | count 2
; Used movq to load i64 into a v2i64 when the top i64 is 0.
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4
; Inserts and extracts with variable indices must be lowered
; to memory accesses.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1
define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
%tmp1 = insertelement <4 x float> %tmp, float %s, i32 3
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep punpcklqdq | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep punpcklqdq | count 1
define <2 x i64> @t1(i64 %s, <2 x i64> %tmp) nounwind {
%tmp1 = insertelement <2 x i64> %tmp, i64 %s, i32 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: grep psllq %t | grep 32
; RUN: grep pslldq %t | grep 12
; RUN: grep psrldq %t | grep 8
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pslldq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 6
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pslldq
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 6
define <4 x float> @t3(<4 x float>* %P) nounwind {
%tmp1 = load <4 x float>* %P
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq
+; RUN: llc < %s -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq
define <2 x i32> @mmx_movzl(<2 x i32> %x) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t
; tests variable insert and extract of a 4 x i32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
define void @test(<4 x float>* %F, i32 %I) {
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep 1084227584 | count 1
+; RUN: llc < %s -march=x86 -mcpu=yonah | grep 1084227584 | count 1
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
define <4 x float> @a(<4 x float> %a, float* nocapture %p) nounwind readonly {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: grep xorps %t | count 2
; RUN: grep andnps %t
; RUN: grep movaps %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: grep xorps %t | count 1
; RUN: grep movaps %t | count 1
; RUN: not grep shuf %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse
+; RUN: llc < %s -march=x86 -mattr=+sse
define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) {
%tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
define <4 x float> @test1(float %a) nounwind {
%tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep pshufd %t | count 2
define <4 x float> @test(float %a) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pinsrw | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pinsrw | count 2
define <2 x i64> @test(i16 %a) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movlhps %t | count 1
; RUN: grep movq %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movss %t | count 1
; RUN: grep movq %t | count 1
; RUN: grep shufps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1
define <2 x i64> @test(<2 x i64>* %p) nounwind {
%tmp = bitcast <2 x i64>* %p to double*
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep movsd
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi,.*%xmm0}
+; RUN: llc < %s -march=x86-64 | not grep movsd
+; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi,.*%xmm0}
define <2 x i64> @test(i64 %i) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movlhps.*%xmm0, %xmm0}
+; RUN: llc < %s -march=x86-64 | grep movd | count 1
+; RUN: llc < %s -march=x86-64 | grep {movlhps.*%xmm0, %xmm0}
define <2 x i64> @test3(i64 %A) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movl.*\$1, %}
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movl.*\$1, %}
define <2 x i64> @test1() nounwind {
entry:
ret <2 x i64> < i64 1, i64 0 >
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movaps
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep esp | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2
; These should both generate something like this:
;_test3:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd
define <2 x i64> @t1(i64 %x) nounwind {
%tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
define <4 x i32> @t(i32 %x, i32 %y) nounwind {
%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
define <4 x float> @t(float %X) nounwind {
%tmp11 = insertelement <4 x float> undef, float %X, i32 0
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 3
define <2 x i64> @t1(<2 x i64>* %ptr) nounwind {
%tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>*
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
define fastcc void @t(<4 x float> %A) nounwind {
%tmp41896 = extractelement <4 x float> %A, i32 0 ; <float> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movz
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movz
define <2 x i64> @doload64(i16 signext %x) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xorp
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp
define void @t1() nounwind {
%tmp298.i.i = load <4 x float>* null, align 16
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss
; PR2472
define <4 x i32> @a(<4 x i32> %a) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpckl | count 7
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpckl | count 7
define void @test(<8 x i16>* %b, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
%tmp = insertelement <8 x i16> zeroinitializer, i16 %a0, i32 0 ; <<8 x i16>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllw
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psrlq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psraw
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psrlq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep CPI
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep CPI
define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
%tmp1 = bitcast <2 x i64> %b1 to <8 x i16>
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllq
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psraw
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2
define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep unpcklps %t | count 1
; RUN: grep pshufd %t | count 1
; RUN: not grep {sub.*esp} %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov
define <4 x i32> @test() nounwind {
%tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 1
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movq | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor
+; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor
define <4 x i32> @t1(i32 %a) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define <2 x i64> @t00(<2 x i64> %a, <2 x i64> %b) nounwind {
%tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 0 >
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t
; RUN: grep shufps %t | count 4
; RUN: grep movaps %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
; RUN: grep pshufd %t | count 4
; RUN: not grep shufps %t
; RUN: not grep mov %t
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi, %xmm0}
-; RUN: llvm-as < %s | llc -march=x86-64 | not grep xor
+; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi, %xmm0}
+; RUN: llc < %s -march=x86-64 | not grep xor
; PR2108
define <2 x i64> @doload64(i64 %x) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7
%struct.vector4_t = type { <4 x float> }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
; PR2485
define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3
define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium-m -o %t
+; RUN: llc < %s -march=x86 -mcpu=pentium-m -o %t
; RUN: grep movlhps %t | count 1
; RUN: grep pshufd %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
; RUN: grep movlhps %t | count 1
; RUN: grep movddup %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd
+; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpck
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
define i32 @t() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpck
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpck
define i32 @t() nounwind optsize {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep unpcklps %t | count 3
; RUN: grep unpckhps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep unpcklps %t | count 1
; RUN: grep unpckhps %t | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep addps %t | count 2
; RUN: grep mulps %t | count 2
; RUN: grep subps %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
; RUN: grep pshufb %t | count 1
; FIXME: this test has a superfluous punpcklqdq pre-pshufb currently.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movlhps %t | count 1
; RUN: grep movhlps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -disable-mmx -o %t
; RUN: grep pshufhw %t | grep -- -95 | count 1
; RUN: grep shufps %t | count 1
; RUN: not grep pslldq %t
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
; RUN: grep pshufb %t | count 1
define <8 x i16> @shuf3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 | grep pshufb | count 2
+; RUN: llc < %s -march=x86 -mcpu=core2 | grep pshufb | count 2
define <8 x i16> @shuf2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stack-alignment=16 -o %t
+; RUN: llc < %s -march=x86 -mcpu=yonah -stack-alignment=16 -o %t
; RUN: grep pextrw %t | count 13
; RUN: grep pinsrw %t | count 14
; RUN: grep rolw %t | count 13
; RUN: not grep esp %t
; RUN: not grep ebp %t
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -stack-alignment=16 -o %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -stack-alignment=16 -o %t
; RUN: grep pshufb %t | count 3
define <16 x i8> @shuf1(<16 x i8> %T0) nounwind readnone {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep pshufb %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
; RUN: grep shuf %t | count 2
; RUN: not grep unpck %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movhlps %t | count 1
; RUN: grep shufps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep movapd %t | count 1
; RUN: grep movaps %t | count 1
; RUN: grep movups %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep xorps %t | count 1
; RUN: not grep shufps %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | \
+; RUN: llc < %s -march=x86 -mattr=+sse2 | \
; RUN: not grep shufps
define void @test(<4 x float>* %res, <4 x float>* %A) {
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t
; RUN: grep punpck %t | count 2
; RUN: not grep pextrw %t
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t
+; RUN: llc < %s -march=x86 -mcpu=core2 -o %t
; RUN: grep shufp %t | count 1
; RUN: grep movupd %t | count 1
; RUN: grep pshufhw %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd | count 1
define void @test(<2 x i64>* %P, i8 %x) nounwind {
%tmp = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0 ; <<16 x i8>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep punpcklwd %t | count 4
; RUN: grep punpckhwd %t | count 4
; RUN: grep "pshufd" %t | count 8
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t
+; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
; RUN: grep punpcklbw %t | count 16
; RUN: grep punpckhbw %t | count 16
; RUN: grep "pshufd" %t | count 16
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse3 | grep movddup
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
+; RUN: llc < %s -march=x86 -mattr=+sse3 | grep movddup
define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind {
%tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 -o %t
; RUN: grep minss %t | grep CPI | count 2
; RUN: grep CPI %t | not grep movss
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
define i32 @t() {
entry:
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xorps | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xorps | count 2
define void @foo(<4 x float>* %P) {
%T = load <4 x float>* %P ; <<4 x float>> [#uses=1]
-; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1
-; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1
-; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2
@M1 = external global <1 x i64>
@M2 = external global <2 x i32>
-; RUN: llvm-as < %s | llc -march=x86-64 | grep call | count 16
+; RUN: llc < %s -march=x86-64 | grep call | count 16
declare <4 x double> @llvm.sin.v4f64(<4 x double> %p)
declare <4 x double> @llvm.cos.v4f64(<4 x double> %p)
-; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 8
-; RUN: llvm-as < %s | llc -march=x86-64 | grep fmodf | count 4
+; RUN: llc < %s -march=x86-64 | grep div | count 8
+; RUN: llc < %s -march=x86-64 | grep fmodf | count 4
define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u) {
%m = srem <4 x i32> %t, %u
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movss | count 2
+; RUN: llc < %s -march=x86-64 | grep movss | count 2
; PR2676
define float @foo(<4 x float> %p, i32 %t) {
; Test that vectors are scalarized/lowered correctly.
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 > %t
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah > %t
+; RUN: llc < %s -march=x86 -mcpu=i386 > %t
+; RUN: llc < %s -march=x86 -mcpu=yonah > %t
%d8 = type <8 x double>
%f1 = type <1 x float>
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
; PR2620
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 | grep movsd | count 5
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -O0 | grep movsd | count 5
+; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5
+; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep movsd | count 5
@x = external global double
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
%struct.blktkntype = type { i32, i32 }
%struct.fieldstruc = type { [128 x i8], %struct.blktkntype*, i32, i32 }
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same when using a shuffle splat.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
; When loading the shift amount from memory, avoid generating the splat.
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; Legalization test that requires scalarizing a vector.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2
; Example that requires splitting and expanding a vector shift.
define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah
; Legalization example that requires splitting a large vector into smaller pieces.
-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
@a = extern_weak global i32 ; <i32*> [#uses=1]
@b = global i32* @a ; <i32**> [#uses=0]
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s
; CHECK: movq $-65535, %rax
; DAGCombiner should fold this to a simple constant.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep paddb %t | count 1
; RUN: grep pextrb %t | count 1
; RUN: not grep pextrw %t
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep paddb %t | count 1
; RUN: grep pand %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep paddw %t | count 1
; RUN: grep movd %t | count 2
; RUN: grep pextrw %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep psubw %t | count 1
; RUN: grep pmullw %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep pmulld %t | count 1
; RUN: grep psubd %t | count 1
; RUN: grep movaps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep mulps %t | count 1
; RUN: grep addps %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep paddw %t | count 1
; RUN: grep movd %t | count 1
; RUN: grep pextrd %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep pextrd %t | count 5
; RUN: grep movd %t | count 3
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep paddd %t | count 1
; RUN: grep pextrd %t | count 2
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep sarb %t | count 8
; v8i8 that is widen to v16i8 then split
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; bitcast a i64 to v2i32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx -o %t
; RUN: grep movd %t | count 1
; Test bit convert that requires widening in the operand.
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; RUN: grep pshufd %t | count 1
; RUN: grep paddd %t | count 1
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; sign extension v2i32 to v2i16
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; grep cvtsi2ss %t | count 1
; sign to float v2i16 to v2f32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; unsigned to float v7i16 to v7f32
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; widening select v6i32 and then a sub
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; widening shuffle v3float and then a add
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t
+; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t
; widening shuffle v3float and then a add
-; RUN: llvm-as < %s | llc | grep {movl.*%edi, %eax}
+; RUN: llc < %s | grep {movl.*%edi, %eax}
; This should be a single mov, not a load of immediate + andq.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-; RUN: llvm-as < %s | llc | grep {movl %edi, %eax}
+; RUN: llc < %s | grep {movl %edi, %eax}
; The input value is already sign extended, don't re-extend it.
; This testcase corresponds to:
; int test(short X) { return (int)X; }
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
; PR1029
target datalayout = "e-p:64:64"
-; RUN: llvm-as < %s | llc | not grep rsp
-; RUN: llvm-as < %s | llc | grep cvttsd2siq
+; RUN: llc < %s | not grep rsp
+; RUN: llc < %s | grep cvttsd2siq
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2
+; RUN: llc < %s -march=x86-64 | grep mov | count 2
; Fold an offset into an address even if it's not a 32-bit
; signed integer.
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | grep rbp
+; RUN: llc < %s -march=x86-64 | grep movq | grep rbp
define i64* @stack_end_address() nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep lea
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep lea
%struct.x = type { float, double }
@X = global %struct.x { float 1.000000e+00, double 2.000000e+00 }, align 16 ; <%struct.x*> [#uses=2]
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {shll.*3, %edi}
+; RUN: llc < %s -march=x86-64 | grep {shll.*3, %edi}
; PR3829
; The generated code should multiply by 3 (sizeof i8*) as an i32,
; not as an i64!
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -o %t1
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -o %t1
; RUN: grep GOTPCREL %t1 | count 4
; RUN: grep %%rip %t1 | count 6
; RUN: grep movq %t1 | count 6
-; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -march=x86-64 | grep mov | count 1
define i32 @f() nounwind {
tail call void @t( i32 1 ) nounwind
-; RUN: llvm-as < %s | llc | grep movswl
+; RUN: llc < %s | grep movswl
target datalayout = "e-p:64:64"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax
@.str = internal constant [26 x i8] c"%d, %f, %d, %lld, %d, %f\0A\00" ; <[26 x i8]*> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | grep ebp
+; RUN: llc < %s -march=x86 | grep mov | grep ebp
define i8* @t() nounwind {
entry:
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3
+; RUN: llc < %s -march=x86 | grep mov | count 3
define i8* @t() nounwind {
entry:
-; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=static | not grep lea
-; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=static | not grep lea
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea
@v = external global i32, align 8
@v_addr = external global i32*, align 8
-; RUN: llvm-as < %s | llc -march=x86-64
+; RUN: llc < %s -march=x86-64
define <4 x i32> @test() {
%tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xor | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xor | count 2
define <4 x i32> @t1() {
%tmp = xor <4 x i32> undef, undef
-; RUN: llvm-as < %s | llc -march=x86 | grep {not\[lwb\]} | count 4
-; RUN: llvm-as < %s | llc -march=x86-64 | grep {not\[lwb\]} | count 4
+; RUN: llc < %s -march=x86 | grep {not\[lwb\]} | count 4
+; RUN: llc < %s -march=x86-64 | grep {not\[lwb\]} | count 4
define i32 @test(i32 %a, i32 %b) nounwind {
entry:
%tmp1not = xor i32 %b, -2
-; RUN: llvm-as < %s | llc -march=x86 | grep xorl | count 1
+; RUN: llc < %s -march=x86 | grep xorl | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9"
-; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12
-; RUN: llvm-as < %s | llc -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
declare void @bar(double %x)
declare void @barf(float %x)
-; RUN: llvm-as < %s | llc -march=x86 | not grep and
-; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: llc < %s -march=x86 | not grep and
+; RUN: llc < %s -march=x86-64 > %t
; RUN: not grep and %t
; RUN: not grep movzbq %t
; RUN: not grep movzwq %t
-; RUN: llvm-as < %s | llc -march=x86 | not grep and
+; RUN: llc < %s -march=x86 | not grep and
; These tests differ from the ones in zext-inreg-0.ll in that
; on x86-64 they do require and instructions.
projects / oota-llvm.git / commitdiff