Thumb2 assembly parsing and encoding for SMMULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 66c6e48ee13e55cc544dded49df88f5ff862ac62..51651e4b2644d8a1db38a0794b1149cd0daeea6d 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3168,14 +3168,14 @@ getMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet,
                       bool &CanAcceptPredicationCode) {
   if (Mnemonic == "and" || Mnemonic == "lsl" || Mnemonic == "lsr" ||
       Mnemonic == "rrx" || Mnemonic == "ror" || Mnemonic == "sub" ||
-      Mnemonic == "smull" || Mnemonic == "add" || Mnemonic == "adc" ||
+      Mnemonic == "add" || Mnemonic == "adc" ||
       Mnemonic == "mul" || Mnemonic == "bic" || Mnemonic == "asr" ||
       Mnemonic == "umlal" || Mnemonic == "orr" || Mnemonic == "mvn" ||
       Mnemonic == "rsb" || Mnemonic == "rsc" || Mnemonic == "orn" ||
       Mnemonic == "sbc" || Mnemonic == "umull" || Mnemonic == "eor" ||
       Mnemonic == "neg" ||
-      (!isThumb() && (Mnemonic == "mov" || Mnemonic == "mla" ||
-                      Mnemonic == "smlal"))) {
+      (!isThumb() && (Mnemonic == "smull" || Mnemonic == "mov" ||
+                      Mnemonic == "mla" || Mnemonic == "smlal"))) {
     CanAcceptCarrySet = true;
   } else
     CanAcceptCarrySet = false;

diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 625671b8958cdf9b0796c521c2c9eccd27aaba7a..f5f65cb0446fd00005eacdad542d1f37acf6a2f1 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1974,6 +1974,18 @@ _func:
 @ CHECK: smulttlt      r8, r3, r4      @ encoding: [0x13,0xfb,0x34,0xf8]
 
 
+@------------------------------------------------------------------------------
+@ SMULL
+@------------------------------------------------------------------------------
+        smull r3, r9, r0, r1
+        it eq
+        smulleq r8, r3, r4, r5
+
+@ CHECK: smull r3, r9, r0, r1          @ encoding: [0x80,0xfb,0x01,0x39]
+@ CHECK: it    eq                      @ encoding: [0x08,0xbf]
+@ CHECK: smulleq r8, r3, r4, r5         @ encoding: [0x84,0xfb,0x05,0x83]
+
+
 @------------------------------------------------------------------------------
 @ SUB (register)
 @------------------------------------------------------------------------------