make -print-machineinstrs work for both SparcV9 and X86

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetMachineImpls.h b/include/llvm/Target/TargetMachineImpls.h
index a2488b5fe844d82fe95d25404caa78503e363fb0..a631b2d1d5fad59f0f97e385a8c0b290d820af69 100644 (file)
--- a/include/llvm/Target/TargetMachineImpls.h
+++ b/include/llvm/Target/TargetMachineImpls.h
@@ -16,6 +16,10 @@
 #define LLVM_TARGET_TARGETMACHINEIMPLS_H
 
 namespace llvm {
+  /// Command line options shared between TargetMachine implementations - 
+  /// these should go in their own header eventually.
+  ///
+  extern bool PrintMachineCode;
 
   class TargetMachine;
   class Module;

diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index acd76fb021b3afff0736177324c9d1f7c84fd26a..485a358b230b1a1be0786955da4fd449a4e5e185 100644 (file)
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -162,6 +162,10 @@ SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out
     PM.add(createInstructionSchedulingWithSSAPass(*this));
 
   PM.add(getRegisterAllocator(*this));
+
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
   PM.add(createPrologEpilogInsertionPass());
 
   if (!DisablePeephole)

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 2c8b79622a43e50c4d73f7a81ffc2dfbe6620aa7..82778d9b8ae105a2ae7c56a758e267f731112459 100644 (file)
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -14,8 +14,22 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Type.h"
 #include "llvm/IntrinsicLowering.h"
+#include "Support/CommandLine.h"
 using namespace llvm;
 
+//---------------------------------------------------------------------------
+// Command-line options that tend to be useful on more than one back-end.
+//
+
+namespace llvm { 
+  bool PrintMachineCode;
+};
+namespace {
+  cl::opt<bool, true> PrintCode("print-machineinstrs",
+    cl::desc("Print generated machine code"),
+    cl::location(PrintMachineCode), cl::init(false));
+};
+
 //---------------------------------------------------------------------------
 // TargetMachine Class
 //

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 4886a114811188568e7fa149c6753ce1f5fe8458..31c5e578ea1d755b9b3a6215fc94908ae099a472 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -25,8 +25,6 @@
 using namespace llvm;
 
 namespace {
-  cl::opt<bool> PrintCode("print-machineinstrs",
-                         cl::desc("Print generated machine code"));
   cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
                         cl::desc("Use the 'simple' X86 instruction selector"));
   cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
@@ -79,18 +77,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
     PM.add(createX86SSAPeepholeOptimizerPass());
 
   // Print the instruction selected machine code...
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
 
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createX86FloatingPointStackifierPass());
 
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
@@ -98,7 +96,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
 
   PM.add(createX86PeepholeOptimizerPass());
 
-  if (PrintCode)  // Print the register-allocated code
+  if (PrintMachineCode)  // Print the register-allocated code
     PM.add(createX86CodePrinterPass(std::cerr, *this));
 
   if (!DisableOutput)
@@ -138,18 +136,18 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
   // FIXME: Add SSA based peephole optimizer here.
 
   // Print the instruction selected machine code...
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
 
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createX86FloatingPointStackifierPass());
 
-  if (PrintCode)
+  if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
@@ -157,7 +155,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
 
   PM.add(createX86PeepholeOptimizerPass());
 
-  if (PrintCode)  // Print the register-allocated code
+  if (PrintMachineCode)  // Print the register-allocated code
     PM.add(createX86CodePrinterPass(std::cerr, TM));
 }