def N1RegModImmFrm : Format<32>;
def N2RegFrm : Format<33>;
def NVCVTFrm : Format<34>;
+def NVDupLnFrm : Format<35>;
// Misc flags.
class NVDupLane<bits<4> op19_16, bit op6, dag oops, dag iops,
InstrItinClass itin, string opc, string dt, string asm,
list<dag> pattern>
- : NDataI<oops, iops, NEONFrm, itin, opc, dt, asm, "", pattern> {
+ : NDataI<oops, iops, NVDupLnFrm, itin, opc, dt, asm, "", pattern> {
let Inst{24-23} = 0b11;
let Inst{21-20} = 0b11;
let Inst{19-16} = op19_16;