[AArch64] Hoist commonly failing check. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249011 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index e0eb6ad1bc8fac0d81c8673ffb121a64903cdae1..178dd248840b807aadf97e175bf272784bce1651 100644 (file)
--- a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -904,6 +904,12 @@ MachineBasicBlock::iterator AArch64LoadStoreOpt::findMatchingUpdateInsnForward(
   unsigned BaseReg = getLdStBaseOp(MemMI).getReg();
   int MIUnscaledOffset = getLdStOffsetOp(MemMI).getImm() * getMemScale(MemMI);
 
+  // Scan forward looking for post-index opportunities.  Updating instructions
+  // can't be formed if the memory instruction doesn't have the offset we're
+  // looking for.
+  if (MIUnscaledOffset != UnscaledOffset)
+    return E;
+
   // If the base register overlaps a destination register, we can't
   // merge the update.
   bool IsPairedInsn = isPairedLdSt(MemMI);
@@ -913,12 +919,6 @@ MachineBasicBlock::iterator AArch64LoadStoreOpt::findMatchingUpdateInsnForward(
       return E;
   }
 
-  // Scan forward looking for post-index opportunities.  Updating instructions
-  // can't be formed if the memory instruction doesn't have the offset we're
-  // looking for.
-  if (MIUnscaledOffset != UnscaledOffset)
-    return E;
-
   // Track which registers have been modified and used between the first insn
   // (inclusive) and the second insn.
   BitVector ModifiedRegs, UsedRegs;