Add some new instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 64dc14c169604e74615b76d501d0c7caa9fd6aad..d99773730da3ffcfde3743bddd1db0b1596298d5 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -191,6 +191,13 @@ let isCall = 1 in
     def CALL32m     : I<0xFF, MRM2m, (ops i32mem:$dst), "call {*}$dst">;
   }
 
+// calltarget instead of i32imm?
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
+  def TAILJMPd : IBr<0xE9, (ops i32imm:$dst), "jmp $dst">;
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
+  def TAILJMPr : I<0xFF, MRM4r, (ops R32:$dst), "jmp {*}$dst">;
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
+  def TAILJMPm : I<0xFF, MRM4m, (ops i32mem:$dst), "jmp {*}$dst">;
        
 //===----------------------------------------------------------------------===//
 //  Miscellaneous Instructions...

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 4fb5ccf5b503c27cf7d6f546e0c3e070b501289d..a6bf00726389b2c1df0041e0a83438731e063c27 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -507,8 +507,16 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
   MachineInstr *MI;
-  assert((MBBI->getOpcode() == X86::RET || MBBI->getOpcode() == X86::RETI) &&
-         "Can only insert epilog into returning blocks");
+
+  switch (MBBI->getOpcode()) {
+  case X86::RET:
+  case X86::RETI:
+  case X86::TAILJMPd:
+  case X86::TAILJMPr:
+  case X86::TAILJMPm: break;  // These are ok
+  default:
+    assert(0 && "Can only insert epilog into returning blocks");
+  }
 
   if (hasFP(MF)) {
     // Get the offset of the stack slot for the EBP register... which is