- Update the virtual reg to machine instruction map when hoisting.

- Fix subtle bug when creating initially creating this map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44873 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index b158e90f16ecba66bbacf316d8a2e074b18fc5d5..b5a00848a2304763a22f541627435876e8dbf5b3 100644 (file)
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -215,7 +215,7 @@ void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
       const MachineInstr &MI = *II;
 
       for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
-        const MachineOperand &MO = MI.getOperand(0);
+        const MachineOperand &MO = MI.getOperand(i);
 
         if (MO.isRegister() && MO.isDef() &&
             MRegisterInfo::isVirtualRegister(MO.getReg()))
@@ -317,7 +317,17 @@ void MachineLICM::Hoist(MachineInstr &MI) {
          "The predecessor doesn't feed directly into the loop header!");
 
   // Now move the instructions to the predecessor.
-  MoveInstToEndOfBlock(MBB, MI.clone());
+  MachineInstr *NewMI = MI.clone();
+  MoveInstToEndOfBlock(MBB, NewMI);
+
+  // Update VRegDefs.
+  for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = NewMI->getOperand(i);
+
+    if (MO.isRegister() && MO.isDef() &&
+        MRegisterInfo::isVirtualRegister(MO.getReg()))
+      VRegDefs[MO.getReg()] = NewMI;
+  }
 
   // Hoisting was successful! Remove bothersome instruction now.
   MI.getParent()->remove(&MI);