const TargetRegisterInfo *TRI;
bool implicitlyDefinesSubReg(unsigned Reg, const MachineInstr *MI);
bool processMachineBasicBlock(MachineBasicBlock *MBB);
-
+ bool usesFrameIndex(const MachineInstr *MI);
public:
static char ID; // Pass identification, replacement for typeid.
explicit ARM64DeadRegisterDefinitions() : MachineFunctionPass(ID) {}
return false;
}
+bool ARM64DeadRegisterDefinitions::usesFrameIndex(const MachineInstr *MI) {
+ for (int I = MI->getDesc().getNumDefs(), E = MI->getNumOperands(); I != E; ++I) {
+ if (MI->getOperand(I).isFI())
+ return true;
+ }
+ return false;
+}
+
bool
ARM64DeadRegisterDefinitions::processMachineBasicBlock(MachineBasicBlock *MBB) {
bool Changed = false;
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
++I) {
MachineInstr *MI = I;
+ if (usesFrameIndex(MI)) {
+ // We need to skip this instruction because while it appears to have a
+ // dead def it uses a frame index which might expand into a multi
+ // instruction sequence during EPI
+ DEBUG(dbgs() << " Ignoring, operand is frame index\n");
+ continue;
+ }
for (int i = 0, e = MI->getDesc().getNumDefs(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDead() && MO.isDef()) {
--- /dev/null
+; RUN: llc -march=arm64 < %s | FileCheck %s
+
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "arm64-apple-ios7.0.0"
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @test1() #0 {
+ %tmp1 = alloca i8
+ %tmp2 = alloca i32, i32 4096
+ %tmp3 = icmp eq i8* %tmp1, null
+ %tmp4 = zext i1 %tmp3 to i32
+
+ ret i32 %tmp4
+
+ ; CHECK-LABEL: test1
+ ; CHECK: adds [[TEMP:[a-z0-9]+]], sp, #16384
+ ; CHECK: adds [[TEMP]], [[TEMP]], #15
+}