Sign-extend 32-bit integer arguments when they are passed in 64-bit registers,

which is what N32/64 does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148875 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 96b297c6fcab85b003a37d8b3f47b093ed335176..2f366b39969511b65192328e43488e6eb891487c 100644 (file)
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2299,7 +2299,10 @@ MipsTargetLowering::LowerCall(SDValue InChain, SDValue Callee,
       Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, LocVT, Arg);
       break;
     case CCValAssign::AExt:
-      Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
+      if (ValVT == MVT::i32)
+        Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, LocVT, Arg);
+      else
+        Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
       break;
     }