[C++11] Use 'nullptr' in tablegen output files.
authorCraig Topper <craig.topper@gmail.com>
Wed, 30 Apr 2014 05:53:35 +0000 (05:53 +0000)
committerCraig Topper <craig.topper@gmail.com>
Wed, 30 Apr 2014 05:53:35 +0000 (05:53 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207611 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/InstrInfoEmitter.cpp
utils/TableGen/RegisterInfoEmitter.cpp
utils/TableGen/SubtargetEmitter.cpp

index afc05b60090003b8e67b76ec1ae47522a7e2ba78..76f05cea3f7ea02800bacbff6106e0d15b5a30e9 100644 (file)
@@ -523,20 +523,20 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   // Emit the implicit uses and defs lists...
   std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses");
   if (UseList.empty())
-    OS << "NULL, ";
+    OS << "nullptr, ";
   else
     OS << "ImplicitList" << EmittedLists[UseList] << ", ";
 
   std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
   if (DefList.empty())
-    OS << "NULL, ";
+    OS << "nullptr, ";
   else
     OS << "ImplicitList" << EmittedLists[DefList] << ", ";
 
   // Emit the operand info.
   std::vector<std::string> OperandInfo = GetOperandInfo(Inst);
   if (OperandInfo.empty())
-    OS << "0";
+    OS << "nullptr";
   else
     OS << "OperandInfo" << OpInfo.find(OperandInfo)->second;
 
@@ -548,10 +548,10 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   else if (!Inst.DeprecatedReason.empty())
     // Emit the Subtarget feature.
     OS << "," << Target.getInstNamespace() << "::" << Inst.DeprecatedReason
-       << ",0";
+       << ",nullptr";
   else
     // Instruction isn't deprecated.
-    OS << ",0,0";
+    OS << ",0,nullptr";
 
   OS << " },  // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n";
 }
index bc252a9bde1c749ad711a7d1f72e15585e1d0662..573c37f4eef41ec8a894e2904bc7c29652e0208c 100644 (file)
@@ -225,7 +225,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
   for (unsigned i = 0; i < NumSets; ++i ) {
     OS << "    \"" << RegBank.getRegSetAt(i).Name << "\",\n";
   }
-  OS << "    0 };\n"
+  OS << "    nullptr };\n"
      << "  return PressureNameTable[Idx];\n"
      << "}\n\n";
 
@@ -1068,7 +1068,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
   // Now that all of the structs have been emitted, emit the instances.
   if (!RegisterClasses.empty()) {
     OS << "\nstatic const TargetRegisterClass *const "
-       << "NullRegClasses[] = { NULL };\n\n";
+       << "NullRegClasses[] = { nullptr };\n\n";
 
     // Emit register class bit mask tables. The first bit mask emitted for a
     // register class, RC, is the set of sub-classes, including RC itself.
@@ -1135,7 +1135,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
          << RC.getName() << "Superclasses[] = {\n";
       for (unsigned i = 0; i != Supers.size(); ++i)
         OS << "  &" << Supers[i]->getQualifiedName() << "RegClass,\n";
-      OS << "  NULL\n};\n\n";
+      OS << "  nullptr\n};\n\n";
     }
 
     // Emit methods.
@@ -1189,7 +1189,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
       else
         OS << RC.getName() << "Superclasses,\n    ";
       if (RC.AltOrderSelect.empty())
-        OS << "0\n";
+        OS << "nullptr\n";
       else
         OS << RC.getName() << "GetRawAllocationOrder\n";
       OS << "  };\n\n";
@@ -1258,7 +1258,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
        << "  if (!Idx) return RC;\n  --Idx;\n"
        << "  assert(Idx < " << SubRegIndices.size() << " && \"Bad subreg\");\n"
        << "  unsigned TV = Table[RC->getID()][Idx];\n"
-       << "  return TV ? getRegClass(TV - 1) : 0;\n}\n\n";
+       << "  return TV ? getRegClass(TV - 1) : nullptr;\n}\n\n";
   }
 
   EmitRegUnitPressure(OS, RegBank, ClassName);
index 39130bde06e31fd57ffbfba52dc9a3a54f7a2df6..846a485959c304337742405d4bb034063a4aaa5a 100644 (file)
@@ -578,7 +578,7 @@ EmitItineraries(raw_ostream &OS,
     OS << "\n";
     OS << "static const llvm::InstrItinerary ";
     if (ItinList.empty()) {
-      OS << '*' << Name << " = 0;\n";
+      OS << '*' << Name << " = nullptr;\n";
       continue;
     }