[ms-inline asm] Address the FIXME in AsmParser.cpp.

// FIXME: Constraints are hard coded to 'm', but we need an 'r'
// constraint for addressof.  This needs to be cleaned up!

Test cases are already in place.  Specifically,
clang/test/CodeGen/ms-inline-asm.c t15(), t16(), and t24().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172569 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/MC/MCParser/AsmParser.cpp b/lib/MC/MCParser/AsmParser.cpp
index ce5ce1dc3f9cc90f023789b89bce60ae76c5c1e9..43c872b809859a2e60fcf8983e9954a96a012ca0 100644 (file)
--- a/lib/MC/MCParser/AsmParser.cpp
+++ b/lib/MC/MCParser/AsmParser.cpp
@@ -3972,15 +3972,13 @@ bool AsmParser::ParseMSInlineAsm(void *AsmLoc, std::string &AsmString,
     unsigned NumExprs = NumOutputs + NumInputs;
     OpDecls.resize(NumExprs);
     Constraints.resize(NumExprs);
     unsigned NumExprs = NumOutputs + NumInputs;
     OpDecls.resize(NumExprs);
     Constraints.resize(NumExprs);

-    // FIXME: Constraints are hard coded to 'm', but we need an 'r'
-    // constraint for addressof.  This needs to be cleaned up!

     for (unsigned i = 0; i < NumOutputs; ++i) {
       OpDecls[i] = std::make_pair(OutputDecls[i], OutputDeclsAddressOf[i]);
     for (unsigned i = 0; i < NumOutputs; ++i) {
       OpDecls[i] = std::make_pair(OutputDecls[i], OutputDeclsAddressOf[i]);

-      Constraints[i] = OutputDeclsAddressOf[i] ? "=r" : OutputConstraints[i];
+      Constraints[i] = OutputConstraints[i];

     }
     for (unsigned i = 0, j = NumOutputs; i < NumInputs; ++i, ++j) {
       OpDecls[j] = std::make_pair(InputDecls[i], InputDeclsAddressOf[i]);
     }
     for (unsigned i = 0, j = NumOutputs; i < NumInputs; ++i, ++j) {
       OpDecls[j] = std::make_pair(InputDecls[i], InputDeclsAddressOf[i]);

-      Constraints[j] = InputDeclsAddressOf[i] ? "r" : InputConstraints[i];
+      Constraints[j] = InputConstraints[i];

     }
   }
 
     }
   }
 

diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index a4b0694bc0c0a6e147704e24a30866e5f0812446..6d62d6b1ff1021b5de46e428f45055b8be90d5d7 100644 (file)
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1727,7 +1727,7 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
        << "    default: llvm_unreachable(\"invalid conversion entry!\");\n"
        << "    case CVT_Reg:\n"
        << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
        << "    default: llvm_unreachable(\"invalid conversion entry!\");\n"
        << "    case CVT_Reg:\n"
        << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"

-       << "      Operands[*(p + 1)]->setConstraint(\"m\");\n"
+       << "      Operands[*(p + 1)]->setConstraint(\"r\");\n"

        << "      ++NumMCOperands;\n"
        << "      break;\n"
        << "    case CVT_Tied:\n"
        << "      ++NumMCOperands;\n"
        << "      break;\n"
        << "    case CVT_Tied:\n"


@@ -1830,9 +1830,13 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
 
         // Add a handler for the operand number lookup.
         OpOS << "    case " << Name << ":\n"
 
         // Add a handler for the operand number lookup.
         OpOS << "    case " << Name << ":\n"

-             << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
-             << "      Operands[*(p + 1)]->setConstraint(\"m\");\n"
-             << "      NumMCOperands += " << OpInfo.MINumOperands << ";\n"
+             << "      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n";
+
+        if (Op.Class->isRegisterClass())
+          OpOS << "      Operands[*(p + 1)]->setConstraint(\"r\");\n";
+        else
+          OpOS << "      Operands[*(p + 1)]->setConstraint(\"m\");\n";
+        OpOS << "      NumMCOperands += " << OpInfo.MINumOperands << ";\n"

              << "      break;\n";
         break;
       }
              << "      break;\n";
         break;
       }