[WebAssembly] Emit .param, .result, and .local through MC.

This eliminates one of the main remaining uses of EmitRawText.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253878 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp b/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
index aed722cf7390736deaf0fb59de83b5959075292b..a53a7cd2ed6ec6bf5eab2f4a2a38ab082e9074ab 100644 (file)
--- a/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
+++ b/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
@@ -15,6 +15,7 @@
 #include "InstPrinter/WebAssemblyInstPrinter.h"
 #include "WebAssembly.h"
 #include "WebAssemblyMachineFunctionInfo.h"
 #include "InstPrinter/WebAssemblyInstPrinter.h"
 #include "WebAssembly.h"
 #include "WebAssemblyMachineFunctionInfo.h"

+#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"

 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCInstrInfo.h"


@@ -51,7 +52,8 @@ void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
   if (Desc.isVariadic())
     for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
          ++i) {
   if (Desc.isVariadic())
     for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
          ++i) {

-      OS << ", ";
+      if (i != 0)
+        OS << ", ";

       printOperand(MI, i, OS);
     }
 
       printOperand(MI, i, OS);
     }
 


@@ -88,9 +90,24 @@ void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
       O << "$push" << (WAReg & INT32_MAX);
     else
       O << "$discard";
       O << "$push" << (WAReg & INT32_MAX);
     else
       O << "$discard";

-  } else if (Op.isImm())
-    O << Op.getImm();
-  else if (Op.isFPImm())
+  } else if (Op.isImm()) {
+    switch (MI->getOpcode()) {
+    case WebAssembly::PARAM:
+    case WebAssembly::RESULT:
+    case WebAssembly::LOCAL:
+      switch (Op.getImm()) {
+      case MVT::i32: O << "i32"; break;
+      case MVT::i64: O << "i64"; break;
+      case MVT::f32: O << "f32"; break;
+      case MVT::f64: O << "f64"; break;
+      default: llvm_unreachable("unexpected type");
+      }
+      break;
+    default:
+      O << Op.getImm();
+      break;
+    }
+  } else if (Op.isFPImm())

     O << toString(APFloat(Op.getFPImm()));
   else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");
     O << toString(APFloat(Op.getFPImm()));
   else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");

diff --git a/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt b/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
index ccc0f0d7ccbca68e79865d0db946d8a9f96e0214..dbfa72553ccc4f0827847652e8d107c26e681268 100644 (file)
--- a/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
+++ b/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
@@ -1,4 +1,5 @@
 add_llvm_library(LLVMWebAssemblyDesc
   WebAssemblyMCAsmInfo.cpp
 add_llvm_library(LLVMWebAssemblyDesc
   WebAssemblyMCAsmInfo.cpp

+  WebAssemblyMCCodeEmitter.cpp

   WebAssemblyMCTargetDesc.cpp
 )
   WebAssemblyMCTargetDesc.cpp
 )

diff --git a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
index fcd4c293f63cf5d34007c064ee4a3dc447412337..4d92f94ac6a5be81f1256071b857b0e207e5fdb4 100644 (file)
--- a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
+++ b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
@@ -65,5 +65,8 @@ extern "C" void LLVMInitializeWebAssemblyTargetMC() {
 
     // Register the MCInstPrinter.
     TargetRegistry::RegisterMCInstPrinter(*T, createWebAssemblyMCInstPrinter);
 
     // Register the MCInstPrinter.
     TargetRegistry::RegisterMCInstPrinter(*T, createWebAssemblyMCInstPrinter);

+
+    // Register the MC code emitter
+    TargetRegistry::RegisterMCCodeEmitter(*T, createWebAssemblyMCCodeEmitter);

   }
 }
   }
 }

diff --git a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
index bb788dce03c72f01c2e24ca86bd859c5ac78c266..6ef01ffade43266a632eaa4f5061d02f533f37cb 100644 (file)
--- a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
+++ b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
@@ -34,13 +34,18 @@ class StringRef;
 class Target;
 class Triple;
 class raw_ostream;
 class Target;
 class Triple;
 class raw_ostream;

+class raw_pwrite_stream;

 
 extern Target TheWebAssemblyTarget32;
 extern Target TheWebAssemblyTarget64;
 
 
 extern Target TheWebAssemblyTarget32;
 extern Target TheWebAssemblyTarget64;
 

+MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII,
+                                              const MCRegisterInfo &MRI,
+                                              MCContext &Ctx);
+

 MCAsmBackend *createWebAssemblyAsmBackend(const Target &T,
                                           const MCRegisterInfo &MRI,
 MCAsmBackend *createWebAssemblyAsmBackend(const Target &T,
                                           const MCRegisterInfo &MRI,

-                                          StringRef TT, StringRef CPU);
+                                          const Triple &TT, StringRef CPU);

 
 } // end namespace llvm
 
 
 } // end namespace llvm
 

diff --git a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index 512cdd1579fbdd8324261a7158d1dfa4309a91e8..c452e1dd024422a91b9234cd109445500b5d8a37 100644 (file)
--- a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -84,7 +84,7 @@ private:
                              unsigned AsmVariant, const char *ExtraCode,
                              raw_ostream &OS) override;
 
                              unsigned AsmVariant, const char *ExtraCode,
                              raw_ostream &OS) override;
 

-  std::string getRegTypeName(unsigned RegNo) const;
+  MVT getRegType(unsigned RegNo) const;

   const char *toString(MVT VT) const;
   std::string regToString(const MachineOperand &MO);
 };
   const char *toString(MVT VT) const;
   std::string regToString(const MachineOperand &MO);
 };


@@ -95,14 +95,14 @@ private:
 // Helpers.
 //===----------------------------------------------------------------------===//
 
 // Helpers.
 //===----------------------------------------------------------------------===//
 

-std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
+MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const {

   const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
   for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
     if (TRC->hasType(T))
   const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
   for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
     if (TRC->hasType(T))

-      return EVT(T).getEVTString();
+      return T;

   DEBUG(errs() << "Unknown type for register number: " << RegNo);
   llvm_unreachable("Unknown register type");
   DEBUG(errs() << "Unknown type for register number: " << RegNo);
   llvm_unreachable("Unknown register type");

-  return "?";
+  return MVT::Other;

 }
 
 std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
 }
 
 std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {


@@ -165,21 +165,30 @@ static void ComputeLegalValueVTs(const Function &F,
 }
 
 void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
 }
 
 void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {

-  SmallString<128> Str;
-  raw_svector_ostream OS(Str);
+  if (!MFI->getParams().empty()) {
+    MCInst Param;
+    Param.setOpcode(WebAssembly::PARAM);
+    for (MVT VT : MFI->getParams())
+      Param.addOperand(MCOperand::createImm(VT.SimpleTy));
+    EmitToStreamer(*OutStreamer, Param);
+  }

 
 

-  for (MVT VT : MFI->getParams())
-    OS << "\t" ".param " << toString(VT) << '\n';

 
   SmallVector<MVT, 4> ResultVTs;
   const Function &F(*MF->getFunction());
   ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs);
   // If the return type needs to be legalized it will get converted into
   // passing a pointer.
 
   SmallVector<MVT, 4> ResultVTs;
   const Function &F(*MF->getFunction());
   ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs);
   // If the return type needs to be legalized it will get converted into
   // passing a pointer.

-  if (ResultVTs.size() == 1)
-    OS << "\t" ".result " << toString(ResultVTs.front()) << '\n';
+  if (ResultVTs.size() == 1) {
+    MCInst Result;
+    Result.setOpcode(WebAssembly::RESULT);
+    Result.addOperand(MCOperand::createImm(ResultVTs.front().SimpleTy));
+    EmitToStreamer(*OutStreamer, Result);
+  }

 
 

-  bool FirstWAReg = true;
+  bool AnyWARegs = false;
+  MCInst Local;
+  Local.setOpcode(WebAssembly::LOCAL);

   for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
     unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
     unsigned WAReg = MFI->getWAReg(VReg);
   for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
     unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
     unsigned WAReg = MFI->getWAReg(VReg);


@@ -192,20 +201,12 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
     // Don't declare stackified registers.
     if (int(WAReg) < 0)
       continue;
     // Don't declare stackified registers.
     if (int(WAReg) < 0)
       continue;

-    if (FirstWAReg)
-      OS << "\t" ".local ";
-    else
-      OS << ", ";
-    OS << getRegTypeName(VReg);
-    FirstWAReg = false;
+    Local.addOperand(MCOperand::createImm(getRegType(VReg).SimpleTy));
+    AnyWARegs = true;

   }
   }

-  if (!FirstWAReg)
-    OS << '\n';
+  if (AnyWARegs)
+    EmitToStreamer(*OutStreamer, Local);

 
 

-  // EmitRawText appends a newline, so strip off the last newline.
-  StringRef Text = OS.str();
-  if (!Text.empty())
-    OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1));

   AsmPrinter::EmitFunctionBodyStart();
 }
 
   AsmPrinter::EmitFunctionBodyStart();
 }
 


@@ -283,6 +284,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) {
   StringRef Text = OS.str();
   if (!Text.empty())
     OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1));
   StringRef Text = OS.str();
   if (!Text.empty())
     OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1));

+
+  AsmPrinter::EmitEndOfAsmFile(M);

 }
 
 bool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI,
 }
 
 bool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI,

diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index dae9cffd2f5a5f10bcf94f07c45af4235c194e10..1fa79020a2e308f13b37fb1673304de20432ca56 100644 (file)
--- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -124,6 +124,11 @@ def JUMP_TABLE : I<(outs I32:$dst), (ins tjumptable_op:$addr),
                    [(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))],
                    "jump_table\t$dst, $addr">;
 
                    [(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))],
                    "jump_table\t$dst, $addr">;
 

+// Function signature and local variable declaration "instructions".
+def PARAM  : I<(outs), (ins variable_ops), [], ".param  \t">;
+def RESULT : I<(outs), (ins variable_ops), [], ".result \t">;
+def LOCAL  : I<(outs), (ins variable_ops), [], ".local  \t">;
+

 //===----------------------------------------------------------------------===//
 // Additional sets of instructions.
 //===----------------------------------------------------------------------===//
 //===----------------------------------------------------------------------===//
 // Additional sets of instructions.
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 4c576ec647dfb2ebf0369cbefb82f95a56890e23..d60c41a2c8704dd4251c8ab9ec5d82f3e6ed3d4d 100644 (file)
--- a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"

+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"

 #include "llvm/IR/Function.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/IR/Function.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/TargetRegistry.h"

diff --git a/test/CodeGen/WebAssembly/call.ll b/test/CodeGen/WebAssembly/call.ll
index f6106b1e117d105c18279b9a7711a23a0b746278..3b5437f5b6cd652110151127ab90704921e25681 100644 (file)
--- a/test/CodeGen/WebAssembly/call.ll
+++ b/test/CodeGen/WebAssembly/call.ll
@@ -14,7 +14,7 @@ declare double @double_nullary()
 declare void @void_nullary()
 
 ; CHECK-LABEL: call_i32_nullary:
 declare void @void_nullary()
 
 ; CHECK-LABEL: call_i32_nullary:

-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .result i32{{$}}

 ; CHECK-NEXT: call i32_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_nullary() {
 ; CHECK-NEXT: call i32_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_nullary() {


@@ -23,7 +23,7 @@ define i32 @call_i32_nullary() {
 }
 
 ; CHECK-LABEL: call_i64_nullary:
 }
 
 ; CHECK-LABEL: call_i64_nullary:

-; CHECK-NEXT: .result i64
+; CHECK-NEXT: .result i64{{$}}

 ; CHECK-NEXT: call i64_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @call_i64_nullary() {
 ; CHECK-NEXT: call i64_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @call_i64_nullary() {


@@ -32,7 +32,7 @@ define i64 @call_i64_nullary() {
 }
 
 ; CHECK-LABEL: call_float_nullary:
 }
 
 ; CHECK-LABEL: call_float_nullary:

-; CHECK-NEXT: .result f32
+; CHECK-NEXT: .result f32{{$}}

 ; CHECK-NEXT: call float_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @call_float_nullary() {
 ; CHECK-NEXT: call float_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @call_float_nullary() {


@@ -41,7 +41,7 @@ define float @call_float_nullary() {
 }
 
 ; CHECK-LABEL: call_double_nullary:
 }
 
 ; CHECK-LABEL: call_double_nullary:

-; CHECK-NEXT: .result f64
+; CHECK-NEXT: .result f64{{$}}

 ; CHECK-NEXT: call double_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @call_double_nullary() {
 ; CHECK-NEXT: call double_nullary, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @call_double_nullary() {


@@ -58,8 +58,8 @@ define void @call_void_nullary() {
 }
 
 ; CHECK-LABEL: call_i32_unary:
 }
 
 ; CHECK-LABEL: call_i32_unary:

-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}

 ; CHECK-NEXT: call i32_unary, $push[[NUM:[0-9]+]], $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_unary(i32 %a) {
 ; CHECK-NEXT: call i32_unary, $push[[NUM:[0-9]+]], $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_unary(i32 %a) {


@@ -68,9 +68,8 @@ define i32 @call_i32_unary(i32 %a) {
 }
 
 ; CHECK-LABEL: call_i32_binary:
 }
 
 ; CHECK-LABEL: call_i32_binary:

-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32, i32{{$}}
+; CHECK-NEXT: .result i32{{$}}

 ; CHECK-NEXT: call i32_binary, $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_binary(i32 %a, i32 %b) {
 ; CHECK-NEXT: call i32_binary, $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_binary(i32 %a, i32 %b) {


@@ -79,7 +78,7 @@ define i32 @call_i32_binary(i32 %a, i32 %b) {
 }
 
 ; CHECK-LABEL: call_indirect_void:
 }
 
 ; CHECK-LABEL: call_indirect_void:

-; CHECK-NEXT: .param i32
+; CHECK-NEXT: .param i32{{$}}

 ; CHECK-NEXT: call_indirect $0{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_void(void ()* %callee) {
 ; CHECK-NEXT: call_indirect $0{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_void(void ()* %callee) {


@@ -88,8 +87,8 @@ define void @call_indirect_void(void ()* %callee) {
 }
 
 ; CHECK-LABEL: call_indirect_i32:
 }
 
 ; CHECK-LABEL: call_indirect_i32:

-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .result i32
+; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .result i32{{$}}

 ; CHECK-NEXT: call_indirect $0, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_indirect_i32(i32 ()* %callee) {
 ; CHECK-NEXT: call_indirect $0, $push[[NUM:[0-9]+]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_indirect_i32(i32 ()* %callee) {

diff --git a/test/CodeGen/WebAssembly/comparisons_f32.ll b/test/CodeGen/WebAssembly/comparisons_f32.ll
index 80fbd0cadd3ae5367b1c726238e715bd2104c7ad..6da4412e8d7818da548f039685daf3a8304b310f 100644 (file)
--- a/test/CodeGen/WebAssembly/comparisons_f32.ll
+++ b/test/CodeGen/WebAssembly/comparisons_f32.ll
@@ -7,8 +7,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f32:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}


@@ -21,8 +20,7 @@ define i32 @ord_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: uno_f32:
 }
 
 ; CHECK-LABEL: uno_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}


@@ -35,8 +33,7 @@ define i32 @uno_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: oeq_f32:
 }
 
 ; CHECK-LABEL: oeq_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}


@@ -94,8 +91,7 @@ define i32 @oge_f32(float %x, float %y) {
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f32:
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -111,7 +107,6 @@ define i32 @ueq_f32(float %x, float %y) {
 
 ; CHECK-LABEL: one_f32:
 ; CHECK-NEXT: .param f32
 
 ; CHECK-LABEL: one_f32:
 ; CHECK-NEXT: .param f32

-; CHECK-NEXT: .param f32

 ; CHECK-NEXT: .result i32
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -126,8 +121,7 @@ define i32 @one_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: ult_f32:
 }
 
 ; CHECK-LABEL: ult_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -142,8 +136,7 @@ define i32 @ult_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: ule_f32:
 }
 
 ; CHECK-LABEL: ule_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -158,8 +151,7 @@ define i32 @ule_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: ugt_f32:
 }
 
 ; CHECK-LABEL: ugt_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -174,8 +166,7 @@ define i32 @ugt_f32(float %x, float %y) {
 }
 
 ; CHECK-LABEL: uge_f32:
 }
 
 ; CHECK-LABEL: uge_f32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}

diff --git a/test/CodeGen/WebAssembly/comparisons_f64.ll b/test/CodeGen/WebAssembly/comparisons_f64.ll
index 0bd82639b85b9812f4fc34383eeda523e9e44cf0..2bb740ab1b11f144fd777b9a0a819e2cd110e2d8 100644 (file)
--- a/test/CodeGen/WebAssembly/comparisons_f64.ll
+++ b/test/CodeGen/WebAssembly/comparisons_f64.ll
@@ -7,8 +7,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f64:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $1, $1{{$}}


@@ -21,8 +20,7 @@ define i32 @ord_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: uno_f64:
 }
 
 ; CHECK-LABEL: uno_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $1, $1{{$}}


@@ -35,8 +33,7 @@ define i32 @uno_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: oeq_f64:
 }
 
 ; CHECK-LABEL: oeq_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}


@@ -94,8 +91,7 @@ define i32 @oge_f64(double %x, double %y) {
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f64:
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -111,7 +107,6 @@ define i32 @ueq_f64(double %x, double %y) {
 
 ; CHECK-LABEL: one_f64:
 ; CHECK-NEXT: .param f64
 
 ; CHECK-LABEL: one_f64:
 ; CHECK-NEXT: .param f64

-; CHECK-NEXT: .param f64

 ; CHECK-NEXT: .result i32
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -126,8 +121,7 @@ define i32 @one_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: ult_f64:
 }
 
 ; CHECK-LABEL: ult_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -142,8 +136,7 @@ define i32 @ult_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: ule_f64:
 }
 
 ; CHECK-LABEL: ule_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -158,8 +151,7 @@ define i32 @ule_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: ugt_f64:
 }
 
 ; CHECK-LABEL: ugt_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}


@@ -174,8 +166,7 @@ define i32 @ugt_f64(double %x, double %y) {
 }
 
 ; CHECK-LABEL: uge_f64:
 }
 
 ; CHECK-LABEL: uge_f64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]], $0, $0{{$}}

diff --git a/test/CodeGen/WebAssembly/comparisons_i32.ll b/test/CodeGen/WebAssembly/comparisons_i32.ll
index 2c95a4c4ac81947eaf59f64d9e88cb5d4aa85852..c03e2b2b6dc3d80d046fe60db178e6abbcf3f0ac 100644 (file)
--- a/test/CodeGen/WebAssembly/comparisons_i32.ll
+++ b/test/CodeGen/WebAssembly/comparisons_i32.ll
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i32:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}

diff --git a/test/CodeGen/WebAssembly/comparisons_i64.ll b/test/CodeGen/WebAssembly/comparisons_i64.ll
index ba56f3f101fc706b1b03f07302cef745c3f48a9d..0b0a8730977723af8a357f916d0732f3cc1d6ed1 100644 (file)
--- a/test/CodeGen/WebAssembly/comparisons_i64.ll
+++ b/test/CodeGen/WebAssembly/comparisons_i64.ll
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i64:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]], $0, $1{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}

diff --git a/test/CodeGen/WebAssembly/dead-vreg.ll b/test/CodeGen/WebAssembly/dead-vreg.ll
index 3174cb899d32470a29c3d7410d0c57c797bda52a..b94a648834ca120ea1206329d26f9a07743a4852 100644 (file)
--- a/test/CodeGen/WebAssembly/dead-vreg.ll
+++ b/test/CodeGen/WebAssembly/dead-vreg.ll
@@ -7,9 +7,7 @@ target triple = "wasm32-unknown-unknown"
 
 define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
 ; CHECK-LABEL: foo:
 
 define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
 ; CHECK-LABEL: foo:

-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
-; CHECK-NEXT: .param i32
+; CHECK-NEXT: .param i32, i32, i32

 ; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
 entry:
   %cmp.19 = icmp sgt i32 %h, 0
 ; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
 entry:
   %cmp.19 = icmp sgt i32 %h, 0

diff --git a/test/CodeGen/WebAssembly/f32.ll b/test/CodeGen/WebAssembly/f32.ll
index 6e6670c778b7890c49eabc6f662084a57f7d6d2e..b709d6d919d68b9f19888203a7da94db951f6e76 100644 (file)
--- a/test/CodeGen/WebAssembly/f32.ll
+++ b/test/CodeGen/WebAssembly/f32.ll
@@ -15,8 +15,7 @@ declare float @llvm.nearbyint.f32(float)
 declare float @llvm.rint.f32(float)
 
 ; CHECK-LABEL: fadd32:
 declare float @llvm.rint.f32(float)
 
 ; CHECK-LABEL: fadd32:

-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param f32, f32{{$}}

 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}

diff --git a/test/CodeGen/WebAssembly/f64.ll b/test/CodeGen/WebAssembly/f64.ll
index 44ab1e6bd59f3ff6cf91c5a075d1874718f7383b..927a57189ab0e58d9f16f99b9929a9c6e382286c 100644 (file)
--- a/test/CodeGen/WebAssembly/f64.ll
+++ b/test/CodeGen/WebAssembly/f64.ll
@@ -15,8 +15,7 @@ declare double @llvm.nearbyint.f64(double)
 declare double @llvm.rint.f64(double)
 
 ; CHECK-LABEL: fadd64:
 declare double @llvm.rint.f64(double)
 
 ; CHECK-LABEL: fadd64:

-; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param f64, f64{{$}}

 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}

diff --git a/test/CodeGen/WebAssembly/func.ll b/test/CodeGen/WebAssembly/func.ll
index 6bc62f3cb29f66ba80c349dd6546fa4b1c1c3b4d..91968f32a35e1a9c15c022c590b3e9a38fd6f283 100644 (file)
--- a/test/CodeGen/WebAssembly/func.ll
+++ b/test/CodeGen/WebAssembly/func.ll
@@ -22,8 +22,7 @@ define i32 @f1() {
 }
 
 ; CHECK-LABEL: f2:
 }
 
 ; CHECK-LABEL: f2:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param i32, f32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]], 0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]], 0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}


@@ -33,9 +32,8 @@ define i32 @f2(i32 %p1, float %p2) {
 }
 
 ; CHECK-LABEL: f3:
 }
 
 ; CHECK-LABEL: f3:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
-; CHECK-NOT: .local
+; CHECK-NEXT: .param i32, f32{{$}}
+; CHECK-NOT: local

 ; CHECK-NEXT: return{{$}}
 ; CHECK: .size f3,
 define void @f3(i32 %p1, float %p2) {
 ; CHECK-NEXT: return{{$}}
 ; CHECK: .size f3,
 define void @f3(i32 %p1, float %p2) {


@@ -45,7 +43,7 @@ define void @f3(i32 %p1, float %p2) {
 ; CHECK-LABEL: f4:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-LABEL: f4:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}

-; CHECK-NEXT: .local
+; CHECK-NEXT: local

 define i32 @f4(i32 %x) {
 entry:
    %c = trunc i32 %x to i1
 define i32 @f4(i32 %x) {
 entry:
    %c = trunc i32 %x to i1

diff --git a/test/CodeGen/WebAssembly/i32.ll b/test/CodeGen/WebAssembly/i32.ll
index b4a00ea26518254155ebaeb5a95e09dd572574dc..39a7972f6b5d99f3c2b1d2344178ce660a5ce349 100644 (file)
--- a/test/CodeGen/WebAssembly/i32.ll
+++ b/test/CodeGen/WebAssembly/i32.ll
@@ -10,8 +10,7 @@ declare i32 @llvm.cttz.i32(i32, i1)
 declare i32 @llvm.ctpop.i32(i32)
 
 ; CHECK-LABEL: add32:
 declare i32 @llvm.ctpop.i32(i32)
 
 ; CHECK-LABEL: add32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -21,8 +20,7 @@ define i32 @add32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: sub32:
 }
 
 ; CHECK-LABEL: sub32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.sub $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.sub $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -32,8 +30,7 @@ define i32 @sub32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: mul32:
 }
 
 ; CHECK-LABEL: mul32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.mul $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.mul $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -43,8 +40,7 @@ define i32 @mul32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: sdiv32:
 }
 
 ; CHECK-LABEL: sdiv32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.div_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.div_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -54,8 +50,7 @@ define i32 @sdiv32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: udiv32:
 }
 
 ; CHECK-LABEL: udiv32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.div_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.div_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -65,8 +60,7 @@ define i32 @udiv32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: srem32:
 }
 
 ; CHECK-LABEL: srem32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.rem_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.rem_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -76,8 +70,7 @@ define i32 @srem32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: urem32:
 }
 
 ; CHECK-LABEL: urem32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.rem_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.rem_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -87,8 +80,7 @@ define i32 @urem32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: and32:
 }
 
 ; CHECK-LABEL: and32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.and $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.and $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -98,8 +90,7 @@ define i32 @and32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: or32:
 }
 
 ; CHECK-LABEL: or32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.or $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.or $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -109,8 +100,7 @@ define i32 @or32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: xor32:
 }
 
 ; CHECK-LABEL: xor32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.xor $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.xor $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -120,8 +110,7 @@ define i32 @xor32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: shl32:
 }
 
 ; CHECK-LABEL: shl32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shl $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shl $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -131,8 +120,7 @@ define i32 @shl32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: shr32:
 }
 
 ; CHECK-LABEL: shr32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shr_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shr_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -142,8 +130,7 @@ define i32 @shr32(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: sar32:
 }
 
 ; CHECK-LABEL: sar32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shr_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.shr_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}

diff --git a/test/CodeGen/WebAssembly/i64.ll b/test/CodeGen/WebAssembly/i64.ll
index 93e7ef7fe248f600c331a1bab8092bedbe54eb08..b12ac7235f56042feeef48a273b7faab3e344576 100644 (file)
--- a/test/CodeGen/WebAssembly/i64.ll
+++ b/test/CodeGen/WebAssembly/i64.ll
@@ -10,8 +10,7 @@ declare i64 @llvm.cttz.i64(i64, i1)
 declare i64 @llvm.ctpop.i64(i64)
 
 ; CHECK-LABEL: add64:
 declare i64 @llvm.ctpop.i64(i64)
 
 ; CHECK-LABEL: add64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.add $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -21,8 +20,7 @@ define i64 @add64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: sub64:
 }
 
 ; CHECK-LABEL: sub64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.sub $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.sub $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -32,8 +30,7 @@ define i64 @sub64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: mul64:
 }
 
 ; CHECK-LABEL: mul64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.mul $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.mul $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -43,8 +40,7 @@ define i64 @mul64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: sdiv64:
 }
 
 ; CHECK-LABEL: sdiv64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.div_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.div_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -54,8 +50,7 @@ define i64 @sdiv64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: udiv64:
 }
 
 ; CHECK-LABEL: udiv64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.div_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.div_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -65,8 +60,7 @@ define i64 @udiv64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: srem64:
 }
 
 ; CHECK-LABEL: srem64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.rem_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.rem_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -76,8 +70,7 @@ define i64 @srem64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: urem64:
 }
 
 ; CHECK-LABEL: urem64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.rem_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.rem_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -87,8 +80,7 @@ define i64 @urem64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: and64:
 }
 
 ; CHECK-LABEL: and64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.and $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.and $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -98,8 +90,7 @@ define i64 @and64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: or64:
 }
 
 ; CHECK-LABEL: or64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.or $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.or $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -109,8 +100,7 @@ define i64 @or64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: xor64:
 }
 
 ; CHECK-LABEL: xor64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.xor $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.xor $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -120,8 +110,7 @@ define i64 @xor64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: shl64:
 }
 
 ; CHECK-LABEL: shl64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shl $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shl $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -131,8 +120,7 @@ define i64 @shl64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: shr64:
 }
 
 ; CHECK-LABEL: shr64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shr_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shr_u $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}


@@ -142,8 +130,7 @@ define i64 @shr64(i64 %x, i64 %y) {
 }
 
 ; CHECK-LABEL: sar64:
 }
 
 ; CHECK-LABEL: sar64:

-; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i64, i64{{$}}

 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shr_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.shr_s $push0, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}

diff --git a/test/CodeGen/WebAssembly/inline-asm.ll b/test/CodeGen/WebAssembly/inline-asm.ll
index cd75ae1aaab324ad9b7a07a6b58722e852f93fa1..8afb16290c9ecbf170baebd4b448d472d45ee028 100644 (file)
--- a/test/CodeGen/WebAssembly/inline-asm.ll
+++ b/test/CodeGen/WebAssembly/inline-asm.ll
@@ -19,8 +19,7 @@ entry:
 }
 
 ; CHECK-LABEL: bar:
 }
 
 ; CHECK-LABEL: bar:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # $1 = bbb($0){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}
 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # $1 = bbb($0){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}

diff --git a/test/CodeGen/WebAssembly/store.ll b/test/CodeGen/WebAssembly/store.ll
index cbe5620668b2cad1d7b00cdccac134fb90dea141..02af54ec97014f17b7fb9f64a8779b91bf5377d1 100644 (file)
--- a/test/CodeGen/WebAssembly/store.ll
+++ b/test/CodeGen/WebAssembly/store.ll
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: i32.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti32(i32 *%p, i32 %v) {
 ; CHECK-NEXT: i32.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti32(i32 *%p, i32 %v) {


@@ -16,8 +15,7 @@ define void @sti32(i32 *%p, i32 %v) {
 }
 
 ; CHECK-LABEL: sti64:
 }
 
 ; CHECK-LABEL: sti64:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i64{{$}}
+; CHECK-NEXT: .param i32, i64{{$}}

 ; CHECK-NEXT: i64.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti64(i64 *%p, i64 %v) {
 ; CHECK-NEXT: i64.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti64(i64 *%p, i64 %v) {


@@ -26,8 +24,7 @@ define void @sti64(i64 *%p, i64 %v) {
 }
 
 ; CHECK-LABEL: stf32:
 }
 
 ; CHECK-LABEL: stf32:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f32{{$}}
+; CHECK-NEXT: .param i32, f32{{$}}

 ; CHECK-NEXT: f32.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf32(float *%p, float %v) {
 ; CHECK-NEXT: f32.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf32(float *%p, float %v) {


@@ -36,8 +33,7 @@ define void @stf32(float *%p, float %v) {
 }
 
 ; CHECK-LABEL: stf64:
 }
 
 ; CHECK-LABEL: stf64:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param f64{{$}}
+; CHECK-NEXT: .param i32, f64{{$}}

 ; CHECK-NEXT: f64.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf64(double *%p, double %v) {
 ; CHECK-NEXT: f64.store $0, $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf64(double *%p, double %v) {

diff --git a/test/CodeGen/WebAssembly/unused-argument.ll b/test/CodeGen/WebAssembly/unused-argument.ll
index 30b70001d56b3ea7540f781a01712be2801aa553..eb12cdefbf3bab7b820d39f04a9ada7ea809f4a5 100644 (file)
--- a/test/CodeGen/WebAssembly/unused-argument.ll
+++ b/test/CodeGen/WebAssembly/unused-argument.ll
@@ -6,8 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: unused_first:
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: unused_first:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: return $1{{$}}
 define i32 @unused_first(i32 %x, i32 %y) {
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: return $1{{$}}
 define i32 @unused_first(i32 %x, i32 %y) {


@@ -15,8 +14,7 @@ define i32 @unused_first(i32 %x, i32 %y) {
 }
 
 ; CHECK-LABEL: unused_second:
 }
 
 ; CHECK-LABEL: unused_second:

-; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: .param i32{{$}}
+; CHECK-NEXT: .param i32, i32{{$}}

 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: return $0{{$}}
 define i32 @unused_second(i32 %x, i32 %y) {
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: return $0{{$}}
 define i32 @unused_second(i32 %x, i32 %y) {