Fix ADD32rr_alt instruction encoding bug. Patch by Marius Wachtler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100480 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 65b7ec023d818ff1e566dfec9ebc425a174d9720..940b439d22a9b5f88ebaaf625d3d5bff51b7f429 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2707,7 +2707,7 @@ let isCodeGenOnly = 1 in {
                    "add{b}\t{$src2, $dst|$dst, $src2}", []>;
   def ADD16rr_alt: I<0x03, MRMSrcReg,(outs GR16:$dst),(ins GR16:$src1, GR16:$src2),
                     "add{w}\t{$src2, $dst|$dst, $src2}", []>, OpSize;
-  def ADD32rr_alt: I<0x03, MRMSrcReg,(outs GR16:$dst),(ins GR16:$src1, GR16:$src2),
+  def ADD32rr_alt: I<0x03, MRMSrcReg,(outs GR32:$dst),(ins GR32:$src1, GR32:$src2),
                     "add{l}\t{$src2, $dst|$dst, $src2}", []>;
 }