(SBB64ri8 GR64:$op, 0)>;
// (sub OP, SETCC_CARRY) -> (adc OP, 0)
+def : Pat<(sub (add GR8:$op1, GR8:$op2), (i8 (X86setcc_c X86_COND_B, EFLAGS))),
+ (ADC8ri GR8:$op1, GR8:$op2)>;
def : Pat<(sub GR8:$op, (i8 (X86setcc_c X86_COND_B, EFLAGS))),
(ADC8ri GR8:$op, 0)>;
+def : Pat<(sub (add GR32:$op1, GR32:$op2), (i32 (X86setcc_c X86_COND_B, EFLAGS))),
+ (ADC32ri8 GR32:$op1, GR32:$op2)>;
def : Pat<(sub GR32:$op, (i32 (X86setcc_c X86_COND_B, EFLAGS))),
(ADC32ri8 GR32:$op, 0)>;
+def : Pat<(sub (add GR64:$op1, GR64:$op2), (i64 (X86setcc_c X86_COND_B, EFLAGS))),
+ (ADC64ri8 GR64:$op1, GR64:$op2)>;
def : Pat<(sub GR64:$op, (i64 (X86setcc_c X86_COND_B, EFLAGS))),
(ADC64ri8 GR64:$op, 0)>;
--- /dev/null
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+define i32 @testi32(i32 %x0, i32 %x1, i32 %y0, i32 %y1) {
+entry:
+ %uadd = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x0, i32 %y0)
+ %add1 = add i32 %y1, %x1
+ %cmp = extractvalue { i32, i1 } %uadd, 1
+ %conv2 = zext i1 %cmp to i32
+ %add3 = add i32 %add1, %conv2
+ ret i32 %add3
+; CHECK-LABEL: testi32:
+; CHECK: addl
+; CHECK-NEXT: adcl
+; CHECK: ret
+}
+
+define i64 @testi64(i64 %x0, i64 %x1, i64 %y0, i64 %y1) {
+entry:
+ %uadd = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %x0, i64 %y0)
+ %add1 = add i64 %y1, %x1
+ %cmp = extractvalue { i64, i1 } %uadd, 1
+ %conv2 = zext i1 %cmp to i64
+ %add3 = add i64 %add1, %conv2
+ ret i64 %add3
+; CHECK-LABEL: testi64:
+; CHECK: addq
+; CHECK-NEXT: adcq
+; CHECK: ret
+}
+
+declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
+declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
define i32 @test1(i32 %sum, i32 %x) nounwind readnone ssp {
entry:
; CHECK-LABEL: test1:
-; CHECK: cmpl %ecx, %eax
+; CHECK: cmpl %eax, %edx
; CHECK-NOT: addl
-; CHECK: adcl $0, %eax
+; CHECK: adcl %ecx, %eax
%add4 = add i32 %x, %sum
%cmp = icmp ult i32 %add4, %x
%inc = zext i1 %cmp to i32