TableGen should not ignore BX instructions for the ARM disassembler. pr9368.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126931 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 197b9b04a3cf9c7035d6d83d5c350946e9ed255b..d707565894b4c4f9e437d7326726c191b7e661cd 100644 (file)
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -136,3 +136,6 @@
 
 # CHECK: blxeq r5
 0x35 0xff 0x2f 0x01
+
+# CHECK: bx r12
+0x1c 0xff 0x2f 0xe1

diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index cec6b9abd06b80161c33741a55cea2cd2219af9e..a2403e6a1d52811781dc09d5de98f12dbebca0e3 100644 (file)
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1631,7 +1631,7 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
     if (Name == "B") return false;
 
     // Ignore the non-Darwin BL instructions and the TPsoft (TLS) instruction.
-    if (Name == "BL" || Name == "BL_pred" || Name == "BLX" || Name == "BX" ||
+    if (Name == "BL" || Name == "BL_pred" || Name == "BLX" ||
         Name == "BLX_pred" || Name == "TPsoft")
       return false;