case ARM_AM::lsl: SBits = 0x0; break;
case ARM_AM::lsr: SBits = 0x2; break;
case ARM_AM::asr: SBits = 0x4; break;
+ case ARM_AM::rrx: // FALLTHROUGH
case ARM_AM::ror: SBits = 0x6; break;
}
@ CHECK: nopne @ encoding: [0x00,0xbf]
@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
+
+@------------------------------------------------------------------------------
+@ SUB (register)
+@------------------------------------------------------------------------------
+ sub.w r5, r2, r12, rrx
+
+@ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05]
+