update testcases for x86 fastcc changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26842 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/fast-cc-callee-pops.ll b/test/CodeGen/X86/fast-cc-callee-pops.ll
index 959a14b4c1491bbdcbed2f722fd762c34656e051..633e7c4868c8c2e58fc2457e8eb49b80ab1eb199 100644 (file)
--- a/test/CodeGen/X86/fast-cc-callee-pops.ll
+++ b/test/CodeGen/X86/fast-cc-callee-pops.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc  | grep 'ret 20'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc  | grep 'ret 28'
 
 ; Check that a fastcc function pops its stack variables before returning.
 

diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
index 43f6493941c8f16c99b69cf64e385f95dad9f90c..c9f9cee703a138a6b85e448aefa6ac505f288073 100644 (file)
--- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -1,7 +1,9 @@
 ; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc  | grep 'mov %EDX, 1'
-
 ; check that fastcc is passing stuff in regs.
 
+; Argument reg passing is disabled due to regalloc issues.  FIXME!
+; XFAIL: *
+
 declare fastcc long %callee(long)
 
 long %caller() {