Commit r185909 was a misapplied patch, fix it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185910 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/InstCombine/InstCombineCompares.cpp b/lib/Transforms/InstCombine/InstCombineCompares.cpp
index d843842cb3a0c49cf11421a65b4aa7dd50f5b5af..fd2b68a9ecdb8aeb0dee5ea2edcb02ce9f594282 100644 (file)
--- a/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -1564,13 +1564,23 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
         }
       }
 
-      // X-C1 <u 2 -> (X & -2) == C1
-      //   iff C1 & 1 == 0
+      // X-C1 <u C2 -> (X & -C2) == C1
+      //   iff C1 & (C2-1) == 0
+      //       C2 is a power of 2
       if (ICI.getPredicate() == ICmpInst::ICMP_ULT && LHSI->hasOneUse() &&
-          LHSV[0] == 0 && RHSV == 2)
+          RHSV.isPowerOf2() && (LHSV & (RHSV - 1)) == 0)
         return new ICmpInst(ICmpInst::ICMP_EQ,
                             Builder->CreateAnd(LHSI->getOperand(0), -RHSV),
                             ConstantExpr::getNeg(LHSC));
+
+      // X-C1 >u C2 -> (X & ~C2) == C1
+      //   iff C1 & C2 == 0
+      //       C2+1 is a power of 2
+      if (ICI.getPredicate() == ICmpInst::ICMP_UGT && LHSI->hasOneUse() &&
+          (RHSV + 1).isPowerOf2() && (LHSV & RHSV) == 0)
+        return new ICmpInst(ICmpInst::ICMP_NE,
+                            Builder->CreateAnd(LHSI->getOperand(0), ~RHSV),
+                            ConstantExpr::getNeg(LHSC));
     }
     break;
   }
@@ -1732,24 +1742,6 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
       default:
         break;
       }
-
-      // X-C1 <u C2 -> (X & -C2) == C1
-      //   iff C1 & (C2-1) == 0
-      //       C2 is a power of 2
-      if (ICI.getPredicate() == ICmpInst::ICMP_ULT && LHSI->hasOneUse() &&
-          RHSV.isPowerOf2() && (LHSV & (RHSV - 1)) == 0)
-        return new ICmpInst(ICmpInst::ICMP_EQ,
-                            Builder->CreateAnd(LHSI->getOperand(0), -RHSV),
-                            ConstantExpr::getNeg(LHSC));
-
-      // X-C1 >u C2 -> (X & ~C2) == C1
-      //   iff C1 & C2 == 0
-      //       C2+1 is a power of 2
-      if (ICI.getPredicate() == ICmpInst::ICMP_UGT && LHSI->hasOneUse() &&
-          (RHSV + 1).isPowerOf2() && (LHSV & RHSV) == 0)
-        return new ICmpInst(ICmpInst::ICMP_NE,
-                            Builder->CreateAnd(LHSI->getOperand(0), ~RHSV),
-                            ConstantExpr::getNeg(LHSC));
     }
   }
   return 0;

diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll
index aaac9b64939e3cf887f2507fd1bca41406368fa4..fbf7f3d6c33bf478018d00f9d88a29d4f06d02b1 100644 (file)
--- a/test/Transforms/InstCombine/icmp.ll
+++ b/test/Transforms/InstCombine/icmp.ll
@@ -1163,3 +1163,61 @@ define i1 @icmp_sub_3_X_uge_2(i32 %X) {
   %cmp = icmp uge i32 %add, 2
   ret i1 %cmp
 }
+
+; CHECK: @icmp_add_X_-14_ult_2
+; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, -2
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[AND]], 14
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_add_X_-14_ult_2(i32 %X) {
+  %add = add i32 %X, -14
+  %cmp = icmp ult i32 %add, 2
+  ret i1 %cmp
+}
+
+; CHECK: @icmp_sub_3_X_ult_2
+; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %X, 1
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[OR]], 3
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_sub_3_X_ult_2(i32 %X) {
+  %add = sub i32 3, %X
+  %cmp = icmp ult i32 %add, 2
+  ret i1 %cmp
+}
+
+; CHECK: @icmp_add_X_-14_uge_2
+; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, -2
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 14
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_add_X_-14_uge_2(i32 %X) {
+  %add = add i32 %X, -14
+  %cmp = icmp uge i32 %add, 2
+  ret i1 %cmp
+}
+
+; CHECK: @icmp_sub_3_X_uge_2
+; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %X, 1
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[OR]], 3
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_sub_3_X_uge_2(i32 %X) {
+  %add = sub i32 3, %X
+  %cmp = icmp uge i32 %add, 2
+  ret i1 %cmp
+}
+
+; CHECK: @icmp_and_X_-16_eq-16
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %X, -17
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_and_X_-16_eq-16(i32 %X) {
+  %and = and i32 %X, -16
+  %cmp = icmp eq i32 %and, -16
+  ret i1 %cmp
+}
+
+; CHECK: @icmp_and_X_-16_ne-16
+; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %X, -16
+; CHECK-NEXT: ret i1 [[CMP]]
+define i1 @icmp_and_X_-16_ne-16(i32 %X) {
+  %and = and i32 %X, -16
+  %cmp = icmp ne i32 %and, -16
+  ret i1 %cmp
+}

diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll
index 41f8aa9ee8124ddcc05e3fa3340104369faea608..aac8803398f091a51712187173bbd130477bf6d8 100644 (file)
--- a/test/Transforms/InstCombine/shift.ll
+++ b/test/Transforms/InstCombine/shift.ll
@@ -272,11 +272,10 @@ define i1 @test19(i32 %A) {
 
 define i1 @test19a(i32 %A) {
 ; CHECK: @test19a
-; CHECK-NEXT: and i32 %A, -4
-; CHECK-NEXT: icmp eq i32
+; CHECK-NEXT: icmp ugt i32 %A, -5
 ; CHECK-NEXT: ret i1
         %B = ashr i32 %A, 2             ; <i32> [#uses=1]
-        ;; (X & -4) == -4
+        ;; X >u ~4
         %C = icmp eq i32 %B, -1         ; <i1> [#uses=1]
         ret i1 %C
 }