Remove a bogus optimization. It's not possible to do a move to low element to a ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44669 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 505c302816513600b2820f7cb3dba05a7a4c5a1a..15286cce7ea13acc1502d3bc5d17fad88a6284bf 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2462,7 +2462,7 @@ bool X86::isUNPCKH_v_undef_Mask(SDNode *N) {
 /// specifies a shuffle of elements that is suitable for input to MOVSS,
 /// MOVSD, and MOVD, i.e. setting the lowest element.
 static bool isMOVLMask(const SDOperand *Elts, unsigned NumElts) {
-  if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16)
+  if (NumElts != 2 && NumElts != 4)
     return false;
 
   if (!isUndefOrEqual(Elts[0], NumElts))

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index da23ccbaa09d168c6d0226de40154b9edded46b2..a196dce1b82a051d20a1122cafeb1c193a6fdaa2 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -2734,12 +2734,6 @@ let Predicates = [HasSSE2] in {
 // Move scalar to XMM zero-extended
 // movd to XMM register zero-extends
 let AddedComplexity = 15 in {
-def : Pat<(v8i16 (vector_shuffle immAllZerosV_bc,
-                  (v8i16 (X86s2vec GR32:$src)), MOVL_shuffle_mask)),
-          (MOVZDI2PDIrr GR32:$src)>, Requires<[HasSSE2]>;
-def : Pat<(v16i8 (vector_shuffle immAllZerosV_bc,
-                  (v16i8 (X86s2vec GR32:$src)), MOVL_shuffle_mask)),
-          (MOVZDI2PDIrr GR32:$src)>, Requires<[HasSSE2]>;
 // Zeroing a VR128 then do a MOVS{S|D} to the lower bits.
 def : Pat<(v2f64 (vector_shuffle immAllZerosV_bc,
                   (v2f64 (scalar_to_vector FR64:$src)), MOVL_shuffle_mask)),