bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; }
bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
+ /// isSuperRegUsed - Test if a super register is currently being used.
+ bool isSuperRegUsed(unsigned Reg) const;
+
/// getRegsUsed - return all registers currently in use in used.
void getRegsUsed(BitVector &used, bool includeReserved);
return RedefinesSuperRegPart(MI, MO.getReg(), TRI);
}
+bool RegScavenger::isSuperRegUsed(unsigned Reg) const {
+ for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg);
+ unsigned SuperReg = *SuperRegs; ++SuperRegs)
+ if (isUsed(SuperReg))
+ return true;
+ return false;
+}
+
/// setUsed - Set the register and its sub-registers as being used.
void RegScavenger::setUsed(unsigned Reg) {
RegsAvailable.reset(Reg);
const MachineOperand MO = *UseMOs[i].first;
unsigned Reg = MO.getReg();
- assert(isUsed(Reg) && "Using an undefined register!");
+ assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined register!");
if (MO.isKill() && !isReserved(Reg)) {
KillRegs.set(Reg);
// Implicit def is allowed to "re-define" any register. Similarly,
// implicitly defined registers can be clobbered.
- assert((isReserved(Reg) || isUnused(Reg) ||
+ assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) ||
+ isSuperRegUsed(Reg) ||
isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&
"Re-defining a live register!");
setUsed(Reg);
; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs | FileCheck %s
-; XFAIL: *
-; Assertion failed: (isUsed(Reg) && "Using an undefined register!"),
-; function forward, file lib/CodeGen/RegisterScavenging.cpp, line 221.
define i16 @f(i32* %p) nounwind {
entry: