Tighten up checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index fc72ba31369e4d10c97f6d8276e3e756f327ae4d..8911562bfc86473465cf6ec4ac42e3ff0e5d41f3 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -42,8 +42,8 @@ bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const {
   // Make sure the instruction is EXACTLY `xchg ax, ax'
   if (MI.getOpcode() == X86::XCHGrr16) {
     const MachineOperand &op0 = MI.getOperand(0), &op1 = MI.getOperand(1);
-    if (op0.isMachineRegister() && op0.getMachineRegNum() == X86::AX &&
-        op1.isMachineRegister() && op1.getMachineRegNum() == X86::AX) {
+    if (op0.isPhysicalRegister() && op0.getReg() == X86::AX &&
+        op1.isPhysicalRegister() && op1.getReg() == X86::AX) {
       return true;
     }
   }